了解IDTR寄存器? [英] Understand IDTR register?

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问题描述

我无法理解这张解释英特尔 X86-64 处理器中的 IDTR 的图片.

I can't understand this image which explain IDTR in intel X86-64 processor.

IDT 基本地址大小为 64,我完全理解,因为它可以几乎位于内存中的任何位置.

IDT base adress size is 64 and I totally get that since it can be nearly anywhere in memory.

但是,为什么 IDT 限制是 16 位?为什么我们需要所有这些位?

But, why IDT limit is 16 bits? why we need all of these bits?

每个向量的大小为 16 并且有 256 个向量,因此我需要表示的最大加法是 16*256=4096,可以在 12 位而不是 16 位中完成.

each vector is of size 16 and there are 256 vector so the maximum addition I need to represent is 16*256=4096 which can be done in 12 bits not 16.

推荐答案

首先,请记住此机制可以追溯到 32 位 80386,其中 lidt 将加载 32 位基础和 16 位限制.

First, keep in mind that this mechanism dates back to the 32-bit 80386, where lidt would load a 32-bit base and 16-bit limit.

我认为使用 16 位限制有两个原因,即使 12 位就足够了:

I think there are two reasons for using a 16-bit limit even though 12 bits would suffice:

  1. lidt 采用与 lgdt 格式相同的基本/限制对(实际上,这两条指令记录在 英特尔手册中的同一页).而 lgdt 确实需要 16 位的限制,因为全局描述符表最多可以达到 64 KB,对应于每个 8 字节的 8K 条目(同样对于 32 位机器).清楚地选择了这个数字,以便对应于 8086 的 16 位段寄存器的 16 位选择器可以用作 GDT 的字节索引,在屏蔽掉用于在 LDT/GDT 之间进行选择的低 3 位之后并指定请求者权限级别.

  1. lidt takes a base/limit pair in the same format as lgdt (indeed the two instructions are documented on the same page in Intel manuals). And lgdt really did need a 16-bit limit, since the global descriptor table could be up to 64 Kbytes, corresponding to 8K entries of 8 bytes each (again for the 32-bit machine). This number was clearly chosen so that a 16-bit selector, corresponding to the 8086's 16-bit segment registers, could be used as a byte index into the GDT, after masking off its low 3 bits which were used to select between LDT/GDT and specify the requestor privilege level.

对两条指令使用相同的格式可能允许它们在它们之间共享微码,从而略微降低 80386 的成本和复杂性.

Using the same format for both instructions probably allowed them to share microcode between them, slightly reducing the 80386's cost and complexity.

由于最小的可寻址单位是字节,因此节省 4 位是毫无意义的,因为没有简单的方法可以将半字节用于其他用途.我想 Intel 可能会说限制字段的高 4 位是保留的,并且可能会想到在以后的 CPU 中将它们用于其他一些用途(例如启用新的中断处理功能),但是,好吧,他们没有.

Since the smallest addressable unit is the byte, saving 4 bits is rather pointless, because there's no easy way to use half a byte for something else. I suppose Intel could have said the high 4 bits of the limit field were reserved, and maybe thought of some other use for them in later CPUs (e.g. to enable new interrupt-handling features), but, well, they didn't.

这篇关于了解IDTR寄存器?的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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