从另一个 Verilog 模块调用任务 [英] Call task from another Verilog module

问题描述

我正在尝试学习 Verilog 并且我有一个 Verilog 模块，我想做的是调用另一个文件并从我当前的模块中运行它.

I'm trying to learn Verilog and I have a Verilog module and what I wish to do is then call another file and run that from within my current module.

所以我的模块如下:

module maths();
//register etc details
initial begin

`include "add.v"

end
endmodule

我从 maths 模块调用的 add.v 文件就像:

and my add.v file that is being called from the maths module is like:

task add;
    A = $random;
    B = $random;
    C = A + B;
    $display("Answer: %d", C);
endtask

但我从任务文件中收到错误near "task": syntax error, unexpected "task" 和 near "endtask": syntax error, unexpected "endtask".

But I am receiving the errors from the task file near "task": syntax error, unexpected "task" and near "endtask": syntax error, unexpected "endtask".

我在如何调用任务中阅读了答案来自 Verilog 中的单独模块? 但是那里给出的关于需要从初始块或始终块中调用任务的答案没有帮助，因为它位于模块中的初始块内.

I read the answer at How to call tasks from a separate module in Verilog? but the answer given there about needing to call the task from within an initial or always block hasn't helped because it is within an initial block in the module.

我哪里出错了?

推荐答案

就像 Serge 所说的，始终将您的文件包含在文件的开头，就在模块语句之前.

Like Serge said, always include your files in the beginning of the file, right before the module statement.

`include "add.v"

module maths();
//register etc details
initial begin
    add;
end
endmodule

至于问题，您在添加任务中缺少开始结束语句.任务总是需要这两个语句来包装你的任务代码.

As for the problem, you are missing begin-end statements in the add task. Tasks always need these two statements to wrap your task code.

所以，这应该有效:

reg A, B, C;

task add;
begin
    A = $random;
    B = $random;
    C = A + B;
    $display("Answer: %d", C);
end
endtask

不要忘记 A、B、C 声明 :) !

Don't forget about A, B, C declarations :) !

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