魔杖 as 和门的合成 [英] Synthesis of wand as and gate

问题描述

这里我有多个驱动程序用于 1 位端口 x.我想通过使用 wand 网络类型来解决它.当我查看原理图时，只有输入端口的最低有效位连接到端口 x，而其余位未读取.我希望使用 a 的所有位并使用 AND 门分配给 x 端口以解析多个驱动程序.

Here I have multiple drivers for 1-bit port x. I want to resolve it by using wand net type. When I check out the schematics, only the least significant bit of input port is connected to port x, while remaining bits as unread. I want all bits of a to be used and assign to x port using AND gate to resolve multiple drivers.

module test(input [3:0]a, output [1:0]b);
  wire [3:0] d [1:0];

  wand temp;
  assign temp=a;

  inst inst_name (.x(temp),.y(d[1][3]),.z(b[1:0]));

  assign d[1] = {4'd15};
  assign d[0] = {4'd0};
endmodule

module inst (input wand x,y, output [1:0]z);
  assign z={x,y};
endmodule  

推荐答案

你可以使用 for generate 循环来实现你想要的:

You can use for generate loop to achieve what you want:

generate
  for(i = 0; i < 4; i = i + 1) begin: wand_loop
    assign temp = a[i];
  end
endgenerate

此代码将生成以下结构:

This code will generate following structure:

正如@mcleod_ideafix 正确指出的那样，如果您将 temp 定义为简单的 wire，则可以使用以下赋值:assign temp = &a; 以实现您的目标.

as correctly pointed out by @mcleod_ideafix, if you define temp as a simple wire you can use following assignment: assign temp = &a; to achieve your goal.

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