电话门之间的区别，中断门，陷阱门？ [英] The difference between Call Gate, Interrupt Gate, Trap Gate?
问题描述
我学习英特尔保护模式。我发现，调用门，中断门，陷阱门几乎是相同的。事实上，除了那个电话门具有参数柜台等领域，而这些3门有不同类型的字段，它们在所有其他领域相同的。
I am studying Intel Protected Mode. I found that Call Gate, Interrupt Gate, Trap Gate are almost the same. In fact, besides that Call Gate has the fields for parameter counter, and that these 3 gates have different type fields, they are identical in all other fields.
至于其功能，它们都被用于一些code段内code控制转移到一些程序。
As to their functions, they are all used to transfer code control into some procedure within some code segment.
我很纳闷，因为这3个门都包含需要跨越边界的权限调用的信息。我们为什么需要3种他们？不只是1不够好？
I am wondering, since these 3 gates all contain the information needed for the call across privilege boundaries. Why do we need 3 kinds of them? Isn't 1 just good enough?
感谢您的时间和响应。
一个相关的问题：<一href=\"http://stackoverflow.com/questions/3442193/when-to-use-interrupt-gate-or-trap-gate\">http://stackoverflow.com/questions/3442193/when-to-use-interrupt-gate-or-trap-gate
推荐答案
一个门（调用，中断，任务或陷阱），用来传送跨段执行的控制权。权限级别检查是根据使用目的和指令的类型做不同。
A gate (call, interrupt, task or trap) is used to transfer control of execution across segments. Privilege level checking is done differently depending on the type of destination and instruction used.
调用门使用CALL和JMP指令。从较低的特权code呼叫门控制转移到更高的特权code。栅极DPL用于确定什么权限级别存取栅极。调用门是（或曾经是，可能）有利于SYSENTER / SYSEXIT机制逐渐放弃，这是更快。
A call gate uses the CALL and JMP instructions. Call gates transfer control from lower privilege code to higher privilege code. The gate DPL is used to determine what privilege levels have access to the gate. Call gates are (or have been, probably) gradually abandoned in favour of the SYSENTER/SYSEXIT mechanism, which is faster.
任务门用于硬件多任务的支持。硬件任务切换可以发生自愿（CALL / JMP到一个任务门描述符），或中断或当NT标志设置的IRET。它与中断或陷阱门以同样的方式。任务门都没有用，以我所知，因为内核通常需要额外的工作完成后任务切换。
Task gates are used for hardware multitasking support. A hardware task switch can occur voluntarily (CALL/JMP to a task gate descriptor), or through an interrupt or an IRET when the NT flag is set. It works the same way with interrupt or trap gates. Task gates are not used, to the best of my knowledge, as kernels usually want extra work done when task switching.
＆中断放大器;陷阱门，与门任务一起，被称为中断描述符表。他们的工作一样调用门，除了传递参数，从一个特权栈到另一个。一个区别是，中断门清除IF位在EFLAGS，而陷阱门没有。这使它们非常适合服务于硬件中断。陷阱被广泛应用于硬件辅助虚拟化。
Interrupt & trap gates, together with task gates, are known as the Interrupt Descriptor Table. They work the same as call gates, except the transfer of parameters, from one privilege stack to another. One difference is that interrupt gates clear the IF bit in EFLAGS, while trap gates do not. This makes them ideal for serving hardware interrupts. Traps are widely used in hardware-assisted virtualization.
有关详细信息，请参见英特尔架构手册上的处理器，你的兴趣。
For more information, see the Intel Architecture Manuals on the processors that interest you.
要回答的评论：
有很多原因，从陷阱区分中断。一个是在范围上的差别：中断门指向内核空间（毕竟，这是谁管理的硬件内核），而陷阱被称为在用户空间。中断处理程序调用响应于硬件事件，而陷阱响应于CPU的指令执行
There are many reasons to distinguish interrupts from traps. One is the difference in scope: interrupt gates point to kernel space (after all, it's the kernel who manages the hardware) while traps are called in userspace. Interrupt handlers are called in response to hardware events, while traps are executed in response to an CPU instruction.
对于一个简单的（但是不切实际）的例子来更好地理解为什么中断和陷阱门区别对待EFLAGS，考虑会发生什么情况下，我们进行了一个单处理器系统上写硬件事件中断处理程序，我们无法清除IF位，而我们服务之一。这将是可能的，而我们在忙于服务第一第二中断到达。那么，我们的中断处理程序将由处理器在我们IH执行过程中的一些随机点被调用。这可能会导致数据损坏，死锁，或其他不良法宝。实际上，中断禁止的是机制，以确保一个系列的内核语句就像一个关键部分治疗之一。
For a simple (but impractical) example to better understand why interrupt and trap gates treat EFLAGS differently, consider what would happen in case we were writing an interrupt handler for hardware events on a uniprocessor system and we couldn't clear the IF bit while we were serving one. It would be possible for a second interrupt to arrive while we were busy serving the first. Then our interrupt handler would be called by the processor at some random point during our IH execution. This could lead to data corruption, deadlocking, or other bad magic. Practically, interrupt disabling is one of the mechanisms to ensure that a series of kernel statements is treated like a critical section.
上面的例子是假设可屏蔽中断，虽然。你不会想忽略NMI的，反正。
The above example is assuming maskable interrupts, though. You wouldn't want to ignore NMIs, anyway.
这在很大程度上是不相关的今天，太多。今天有
It's largely irrelevant today, too. Today there's practically no distinction between fast and slow interrupt handlers (search for "Fast and Slow Handlers"), interrupt handlers can execute in nested fashion, SMP processors make it mandatory to couple local interrupt disabling with spin locks, and so forth.
现在，陷阱门确实是用来服务软件中断，异常等页面错误或除零异常在你的处理器可能是通过一个陷阱门处理。使用陷阱门来控制程序执行的最简单的例子是INT 3指令，它是用来实现断点调试。在做虚拟化，什么情况是，管理程序在0环运行，并且通常是在环1来宾内核 - 在特权code会失败，一般异常故障。 Witchel和布鲁姆开发二进制翻译，该基本上改写指令来模拟其效果。关键指令被发现，并与陷阱取代。然后陷阱执行时，将控制权交给VMM /虚拟机管理程序，它负责在0环仿效关键指令。
Now, trap gates are indeed used to service software interrupts, exceptions, etc. A page fault or division by zero exception in your processor is probably handled through a trap gate. The simplest example of using trap gates to control program execution is the INT 3 instruction, which is used to implement breakpoints in debuggers. When doing virtualization, what happens is that the hypervisor runs in ring 0, and the guest kernel usually in ring 1 - where privileged code would fail with general exception fault. Witchel and Rosenblum developed binary translation, which is basically rewriting instructions to simulate their effects. Critical instructions are discovered and replaced with traps. Then when the trap executes, control is yielded to the VMM/hypervisor, which is responsible for emulating the critical instructions in ring 0.
通过硬件辅助虚拟化，陷阱和-的emulate技术已经有些在其使用限制（因为它是相当昂贵的，特别是当它是动态的），但二进制翻译的做法的still~~MD~~aux广泛应用于。
With hardware-assisted virtualization, the trap-and-emulate technique has been somewhat limited in its use (since it's quite expensive, especially when it's dynamic) but the practice of binary translation is still widely used.
有关更多信息，我建议你看看：
For more information, I'd suggest you check out:
- Linux Device Drivers, Third Edition (available online)
- For binary translation, QEMU is an excellent start.
- Regarding trap-and-emulate, check out a comparison between software/hardware techniques.
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