是否为 VHDL numeric_std 有符号/无符号定义了溢出 [英] Is overflow defined for VHDL numeric_std signed/unsigned

问题描述

如果我有一个 unsigned(MAX downto 0) 包含值 2**MAX - 1，那么 VHDL (87|93|200X) 标准是否定义了什么当我将它加一时会发生什么?(或者，类似地，当我从零减一时?)

If I have an unsigned(MAX downto 0) containing the value 2**MAX - 1, do the VHDL (87|93|200X) standards define what happens when I increment it by one? (Or, similarly, when I decrement it by one from zero?)

推荐答案

简短回答:

没有溢出处理，溢出进位只是丢失了.因此，结果只是您的运算模 2^MAX 的整数结果.

There is no overflow handling, the overflow carry is simply lost. Thus the result is simply the integer result of your operation modulo 2^MAX.

更长的答案:

numeric_std 包是一个标准包，但它不是 VHDL 标准 (87,93,200X) 的核心.供参考:numeric_std.vhd

The numeric_std package is a standard package but it is not is the Core the VHDL standards (87,93,200X). For reference : numeric_std.vhd

+ 运算符最后调用了 ADD_UNSIGNED (L, R : unsigned; C : std_logic) 函数(带有 C = '0').请注意，任何整数/自然操作数都会首先转换为 unsigned.

The + operator in the end calls the ADD_UNSIGNED (L, R : unsigned; C : std_logic) function (with C = '0'). Note that any integer/natural operand is first converted into an unsigned.

函数的定义是:

function ADD_UNSIGNED (L, R : unsigned; C : std_logic) return unsigned is
    constant L_left : integer   := L'length-1;
    alias XL        : unsigned(L_left downto 0) is L;
    alias XR        : unsigned(L_left downto 0) is R;
    variable RESULT : unsigned(L_left downto 0);
    variable CBIT   : std_logic := C;
begin
    for i in 0 to L_left loop
        RESULT(i) := CBIT xor XL(i) xor XR(i);
        CBIT      := (CBIT and XL(i)) or (CBIT and XR(i)) or (XL(i) and XR(i));
    end loop;
    return RESULT;
end ADD_UNSIGNED;

如您所见，如果 i = L_left 的 CBIT='1'(进位)，则会发生溢出".结果位RESULT(i)正常计算，忽略最后一个进位bot值.

As you can see an "overflow" occurs if CBIT='1' (carry bit) for i = L_left. The result bit RESULT(i) is calculated normally and the last carry bot value is ignored.

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