何时使用VHDL库std_logic_unsigned和numeric_std? [英] When to use VHDL library std_logic_unsigned and numeric_std?
问题描述
我在ISE中使用VHDL-200X.我总是使用std_logic_vector，std_logic，integer，boolean和real之类的数据类型，始终使用std_logic_vector转换为integer并反转.
我的队友要求我使用library IEEE的这三个部分.
I use VHDL-200X in ISE.I always use data type like std_logic_vector,std_logic,integer,boolean and real.Always use std_logic_vector convert to integer and reverse.
My team mates ask me to use these three parts of library IEEE.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
但是有人说不要使用IEEE.STD_LOGIC_UNSIGNED.ALL而不是IEEE.NUMERIC_STD.ALL，因为您在numeric_std中拥有了所需的所有内容，并且STD_LOGIC_UNSIGNED不是标准库. 此处.
But someone said do not use IEEE.STD_LOGIC_UNSIGNED.ALL instead of IEEE.NUMERIC_STD.ALL.Because you have everything you need in numeric_std, and STD_LOGIC_UNSIGNED is not standard library. Here.
我对此感到困惑，有人可以帮忙吗?
I confused about it and anybody can help?
推荐答案
请勿使用std_logic_arith或std_logic_**signed.需要有符号或无符号值时，请始终使用numeric_std.以前的软件包声称是IEEE，但事实并非如此.它们是Synopsys或Mentor Graphics的特定于供应商的扩展.
Never use std_logic_arith or std_logic_**signed. Always use numeric_std when signed or unsigned values are needed. The former packages claim to be IEEE, but they aren't. They are vendor specific extensions from Synopsys or Mentor Graphics.
在两个std_logic_vector上都基于导入的程序包定义了算术运算.例如意味着您不能在同一体系结构中使用带符号和无符号值.
Both defined arithmetic operations on std_logic_vector based on the imported packages. This e.g. means you can't used signed and unsigned values in the same architecture.
在integer中进行所有数学运算有一些缺点:
Doing all math in integers has some drawbacks:
- 没有未初始化的值
- 没有"X"传播
- 限制为32位
(如何编写64位计数器?)
- no uninitialized value
- no 'X' propagation
- limited to 32 bits
(How to write a 64 bit counter?)
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