“锁"在手臂组件中对应的前缀是什么?在 x86 中? [英] What's the corresponding prefix in arm assembly for "lock" in x86?

问题描述

我有一个 x86 汇编代码:

I have a x86 assembly code:

unsigned int oldval;

__asm__ __volatile__ (
"movl   $1, %0  \n"
"lock xaddl %0, (%1)    \n"
: "=a" (oldval) :  "b" (n))l;

return oldval;

我想把它翻译成手臂组装.arm组件中是否有任何前缀与此处的lock"具有相同的作用?

and I want to translate it into arm assembly. Is there any prefix in arm assembly that does the same thing as "lock" here?

推荐答案

我不知道 ARM，但从掩饰手册来看，以下应该近似于您的原子交换和添加:

I don't know ARM, but from glossing over the manual, the following should approximate your atomic exchange-and-add:

foo:
    LDREX R1, [R0]         ;  R0 is "n", load linked
    ADD   R2, R1, 1        ;  R2 = R1 + 1
    STREX R3, R2, [R0]     ;  store conditionally, R3 = 0 if and only if success
    CBNZ  R3, foo          ;  on failure, try again

    ;; now return R1 to "oldval"

与在 x86 上不同，此代码似乎需要任意长的时间才能成功，但我不确定是否有任何保证最终会成功.

Unlike on x86, it would appear that this code could take arbitrarily long to succeed, but I'm not sure whether there are any guarantees that this will eventually succeed.

但是，请注意 ARM 方法更安全，因为条件存储会在它应该成功的时候准确地成功.相比之下，您的 x86 代码(看起来像是取自内核自旋锁?)只是在 *n 上加一并测试原始 *n 是否为零.如果有足够多的线程同时尝试执行此操作，则 *n 可能会溢出并为零，即使您不被允许获取锁.

However, note that the ARM approach is safer, since the conditional store will success precisely when it should. By contrast, your x86 code (which looks like taken from a kernel spin lock?) just adds one to *n and tests whether the original *n was zero. If enough threads attempt this concurrently, then *n can overflow and be zero even though you weren't allowed to take the lock.

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