什么是相当于英特尔 xchgl 的 ARM 指令? [英] What's ARM instruction equivalent to Intel's xchgl?

问题描述

我发现 LDREX 和 STREX 可能是可以使用的.但它们是两条指令(因此不提供xchgl的原子性).我想以原子方式交换的值是一个 32 位值.LDREX 和 STREX 可以以提供 32 位值的原子交换的方式使用，还是其他方式来实现它(前提是它适用于 armv7l 或更高版本)?

I found LDREX and STREX might be the ones to use. But they are two instructions (and thus not provide the atomicity of xchgl). The value I want to exchange atomically is a 32-bit value. Can LDREX and STREX be used in a way that provides atomic exchange of a 32-bit value or are they other ways to achieve it (provided it works on armv7l or higher)?

通常，我会使用 gcc 的 atomic builtins 或更新的(C++11 等效项)内置函数对于这样的原子操作.但在这种情况下，我必须在 C 中使用内联汇编(将基于 x86 的 futex 实现移植到 ARM 架构).谢谢！

Normally, I'd the gcc's atomic builtins or the more recent (C++11 equivalent) builtin functions for such atomic operations. But in this case, I have to use inline assembly in C (to port an x86-based futex implementation to ARM architecture). Thanks!

推荐答案

在ARM指令集中，没有原子交换指令.相反，您使用 ldrex 和 strex 和这样的代码:

In the ARM instruction set, there is no atomic exchange instruction. Instead you use ldrex and strex and code like this:

@ exchange r0 and [r1]
ldrex r2,[r1]
strex r3, r0,[r1]
mov   r0,r2

当在 ldrex 和 strex 之间修改 [r1] 或由于其他原因不能保证交换是原子的时，1 是在 r3 中返回并且不执行存储.如果序列是原子的，则返回 0.因此，通过在循环中执行此代码段直到获得零 r3，您最终可以实现原子交换操作.这实际上是 gcc 和 clang 如何实现相应的内在；将 -S 传递给编译器以观察它的作用.

When [r1] is modified between ldrex and strex or the exchange cannot be guaranteed to be atomic for some other reason, 1 is returned in r3 and the store isn't performed. If the sequence is atomic, 0 is returned. Thus, by executing this snippet in a loop until you get a zero r3 you can eventually reach an atomic exchange operation. That's actually how gcc and clang implement the corresponding intrinsic; pass -S to the compiler to observe what it does.

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