大会分段型号的32位内存限制 [英] Assembly Segmented Model 32bit Memory Limit
问题描述
如果用分段存储器模式来运行32位操作系统将他们仍然是一个 4GB 限制？
If a 32bit Operating System operated with a segmented memory model would their still be a 4GB limit?
我读的英特尔奔腾处理器系列开发人员手册，并指出了分段存储器模型，它有可能映射到 64TB 的内存。
I was reading the Intel Pentium Processor Family Developer's Manual and it states that with a Segmented memory model that it is possible map up to 64TB of memory.
以存储器分段模型
组织，逻辑地址
空间由多达16,383的
达4千兆字节的段，每段，或
共一样大2 ^ 46字节（64
兆兆字节）。处理器映射这64
TB的逻辑地址空间到
由物理地址空间
地址转换机制
在第11章申请中描述
程序员可以忽略的细节
这种映射。的优势
分段模型是内偏移
每个地址空间是单独
检查和访问每个
段可单独
控制。
"In a segmented model of memory organization, the logical address space consists of as many as 16,383 segments of up to 4 gigabytes each, or a total as large as 2^46 bytes (64 terabytes). The processor maps this 64 terabyte logical address space onto the physical address space by the address translation mechanism described in Chapter 11. Application programmers can ignore the details of this mapping. The advantage of the segmented model is that offsets within each address space are separately checked and access to each segment can be individually controlled.
这是不是一个复杂的问题。我只是想确保我理解正确的文本。如果Windows或其他操作系统在分段模式工作，而不是一个平面模型将内存限制是64TB？
This is not a complex question. I just want to be sure I understood the text correctly. If Windows or any other OS worked in a segmented model rather than a flat model would the memory limit be 64TB?
更新：
英特尔的3-2 3A系统文档。
Intel's 3-2 3a System Documentation.
http://pdos.csail.mit.edu/ 6.828 / 2005 /读数/ I386 / c05.htm
段寄存器不应该被认为是在传统的实模式感。段寄存器充当全局描述符表选择器。
The Segment Register should NOT be thought as in the traditional Real-Mode sense. The Segment Register acts as a SELECTOR for the Global Descriptor Table.
在保护模式下，你使用形式的一个逻辑地址：B到内存寻址。如在实模式中，A是段部分和B是该段中的偏移量。在>保护模式的寄存器限制在32位。 32位可以重新present 0和4Gb之间的任意整数。
因为B可以是0和4Gb我们的段之间的任意值现在有4 GB的最大尺寸（理由同实模式）。
现在的差异。在保护模式下，A是不是该段的绝对值。在保护模式下，A是一个选择。选择器重新presents偏移到一个系统表称为全局描述符表（GDT）。在GDT包含的描述符的清单。这些描述符包含描述一个段的特征的信息。
In Protected mode you use a logical address in the form A:B to address memory. As in Real Mode, A is the segment part and B is the offset within that segment. The registers in > protected mode are limited to 32 bits. 32 bits can represent any integer between 0 and 4Gb. Because B can be any value between 0 and 4Gb our segments now have a maximum size of 4Gb (Same reasoning as in real-mode). Now for the difference. In protected mode A is not an absolute value for the segment. In protected mode A is a selector. A selector represents an offset into a system table called the Global Descriptor Table (GDT). The GDT contains a list of descriptors. Each of these descriptors contains information that describes the characteristics of a segment.
该段选择提供了不能用分页实现额外的安全性。
The Segment Selector provides additional security that cannot be achieved with paging.
这两种方法[分段和分页]有其优点，但分页要好得多。市场细分是，虽然仍然可用，迅速成为过时的内存保护和虚拟内存的方法。事实上，x86-64架构需要一些它的指示一台内存模型（一个段为0的基础，并为0xFFFFFFFF的限制），才能正常运行。
Both of these methods [Segmentation and Paging]have their advantages, but paging is much better. Segmentation is, although still usable, fast becoming obsolete as a method of memory protection and virtual memory. In fact, the x86-64 architecture requires a flat memory model (one segment with a base of 0 and a limit of 0xFFFFFFFF) for some of it's instructions to operate properly.
分割时，但是，完全内置入x86架构。这是不可能绕过它。所以在这里我们将告诉你如何建立自己的全局描述符表 - 段描述符的列表
Segmentation is, however, totally in-built into the x86 architecture. It's impossible to get around it. So here we're going to show you how to set up your own Global Descriptor Table - a list of segment descriptors.
正如前面提到的，我们要尝试建立一个平面内存模式。该部门的窗口应该开始在00000000和扩展到0xFFFFFFFF（存储器末尾）。然而，有一件事是分割能做到这一点分页不能，而这集电环的水平。
As mentioned before, we're going to try and set up a flat memory model. The segment's window should start at 0x00000000 and extend to 0xFFFFFFFF (the end of memory). However, there is one thing that segmentation can do that paging can't, and that's set the ring level.
-http：//www.jamesmolloy.co.uk/tutorial_html/4.-The%20GDT%20and%20IDT.html
-http://www.jamesmolloy.co.uk/tutorial_html/4.-The%20GDT%20and%20IDT.html
一个GDT比如列出了各种用户的访问级别和内存访问方面：
A GDT for example lists the various users their access levels and the areas of memory access:
样品GDT表
GDT[0] = {.base=0, .limit=0, .type=0};
// Selector 0x00 cannot be used
GDT[1] = {.base=0, .limit=0xffffffff, .type=0x9A};
// Selector 0x08 will be our code
GDT[2] = {.base=0, .limit=0xffffffff, .type=0x92};
// Selector 0x10 will be our data
GDT[3] = {.base=&myTss, .limit=sizeof(myTss), .type=0x89};
// You can use LTR(0x18)
http://wiki.osdev.org/GDT_Tutorial#What_should_i_put_in_my_GDT.3F
寻呼部是映射到物理存储器。 （PAE）是提供addtional内存最高可达64GB。
The Paging portion is what maps to physical memory. (PAE) is what provides addtional memory up to 64GB.
因此，在短期。答案是否定的，你不能比逻辑4GB内存多。我考虑64TB权利要求中印错了的英特尔奔腾处理器系列开发人员手册。
So in short. The answer is no you cannot have more than 4GB of logical memory. I consider the claim for 64TB a misprint in the Intel Pentium Processor Family Developer's Manual.
推荐答案
编辑：我的回答假设的4GB的限制你指的是线性（虚拟）地址空间的最大尺寸，而不是物理地址空间。如在下面的评论所解释的，后者是不实际限制为4GB在所有 - 使用平面内存模型即使当
My answer assumes that by "4GB limit" you are referring to the maximum size of linear (virtual) address space, rather than of physical address space. As explained in the comments below, the latter is not actually limited to 4GB at all - even when using a flat memory model.
重复你的报价，并强调：
Repeating your quote, with emphasis:
在逻辑地址空间由
的多达16,383到的段
每4千兆字节
the logical address space consists of as many as 16,383 segments of up to 4 gigabytes each
现在，从报价英特尔®64和IA-32架构软件开发人员手册卷1：基本架构（PDF提供的这里）：
Now, quoting from "Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture" (PDF available here):
在内部，所有属于段
为一个系统定义的映射到
处理器的线性的地址空间。
Internally, all the segments that are defined for a system are mapped into the processor’s linear address space.
正是这种线性地址空间，（32位处理器）限制为4GB。所以，分段存储器模式仍然会受到限制。
It is this linear address space which (on 32-bit processor) is limited to 4GB. So, a segmented memory model would still be subject to the limit.
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