制作配方的非依赖的目标prevent重建 [英] Make recipe to prevent rebuilding of non-dependent targets

问题描述

我有以下项目的目录结构：

I have the following project directory structure:

prog
 |
 +-[include]
 |  +-[mod1]
 |  |   |
 |  |   +-a_mod1.h
 |  |   +-b_mod1.h
 |  |
 |  +-[mod2]
 |  |   +-a_mod2.h
 |  |   +-b_mod2.h
 |  |
 |  +-app1.h
 |  +-app2.h
 |  +-header1.h
 |  +-header1.h
 |
 +-[src]
 |  +-[mod1]
 |  |   |
 |  |   +-a_mod1.cpp
 |  |   +-b_mod1.cpp
 |  |
 |  +-[mod2]
 |  |   +-a_mod2.cpp
 |  |   +-b_mod2.cpp
 |  +-app1.cpp
 |  +-app2.cpp
 |
 +-build

App1的依赖于MOD1和MOD2，其中作为App2的只依赖于MOD1。

App1 depends on mod1 and mod2 where as App2 depends only on mod1.

通过表示的模块下面的makefile文件和应用都建立正确的 - 但是如果我更改了模2，然后做一个让所有，App2的被重建，即使它没有依赖

With the makefile denoted below the modules and apps all build correctly - however if I make a change to mod2 and then do a 'make all', App2 gets rebuilt even though it doesn't have a dependency.

这样做的原因是，因为OBJ被传递到靶构建配方是所有的OBJ文件的，而不仅仅是特定那些当前目​​标的需要。

The reason for this is because OBJ being passed into the target build recipe is all of the OBJs and not just the specific ones that the current target needs.

我不知道可以只作出什么改变makefile文件传递依赖对象到的正在建造的当前目标。

I was wondering what change to the makefile can be made to only pass the dependent objects to the current target that's being built.

生成文件：

CC        := g++
LD        := g++

TARGETS   := app1 app2
MODULES   := mod1 mod2
INC_DIR   := $(addprefix include/,$(MODULES))
SRC_DIR   := $(addprefix src/,$(MODULES))
BUILD_DIR := $(addprefix build/,$(MODULES))

SRC       := $(foreach sdir,$(SRC_DIR),$(wildcard $(sdir)/*.cpp))
OBJ       := $(patsubst src/%.cpp,build/%.o,$(SRC))
INCLUDES  := -Iinclude $(addprefix -I,$(INC_DIR))

vpath %.cpp $(SRC_DIR)

define make-goal
$1/%.o: %.cpp
   $(CC) $(INCLUDES) -c $$< -o $$@
endef

.PHONY: all checkdirs clean

all: checkdirs $(TARGETS)

$(TARGETS) : %: $(OBJ)
   $(CC) $(INCLUDES) -o build/$@ src/$@.cpp $^

checkdirs: $(BUILD_DIR)

$(BUILD_DIR):
   @mkdir -p $@

clean:
   @rm -rf $(BUILD_DIR)
   @rm -rf $(TARGETS)

$(foreach bdir,$(BUILD_DIR),$(eval $(call make-goal,$(bdir))))

生成文件已经从以下的答案改变​​用途：
http://stackoverflow.com/a/2484343

推荐答案

中有虚假的所有目标列出了三个目标。

there are three targets listed in the phony 'all' target.

每个那些应该有一个列出单独的规则，
而不是混为一谈两个目标APP1和APP2在一起。

Each of those should have a separate rule listed, rather than lumping two of the targets 'app1' and 'app2' together.

注意：任何共同文件更改/编译会导致在重新创建两个目标

Note: any common file changes/compiles will result in both targets being re-created.

打破SRC到SRC_APP1 SRC_APP2然后使用适当的SRC_APPx宏在每个APP1 APP2和目标。

break the 'SRC' into SRC_APP1 SRC_APP2 then use the appropriate SRC_APPx macro in each of the app1 and app2 targets.

使用类似的分离为'OBJ宏和包括宏观

use similar separation for the 'OBJ' macro and the 'INCLUDES' macro

不要使用的foreach规则，即要求所有目标要建

Do not use the 'foreach' rules as that is asking for all the targets to be built

有需要解决其他几个细节，但上面的应该指向你在正确的方向。

there are several other details that need addressing, but the above should point you in the right direction.

有一件事情，应该有很大帮助。

One thing that should greatly help.

有APP1 APP2并放置在独立董事的对象文件并生成文件看在相应的目录为每个APPX

Have the object files for app1 and app2 placed in separate directors and have the makefile look in the appropriate directory for each appx

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