什么是PERF缓存事件意义？ [英] What are perf cache events meaning?
问题描述
我试图弄清楚为什么修改后的C程序运行速度比其非柜台修改部分（我加入code的极少数线路进行一些额外的工作）。在这种情况下，我怀疑的缓存效果的是主要的解释（指令高速缓存）。于是我到了 PERF （https://perf.wiki.kernel.org/index.php/Main_Page）分析工具，但不幸的是我无法理解的意思其有关高速缓存未命中输出。
提供有关高速缓存几个事件：
缓存引用[硬件事件]
高速缓存未命中[硬件事件]
L1-DCACHE-负载[硬件缓存事件]
L1-DCACHE负荷门柱[硬件缓存事件]
L1-DCACHE-店[硬件缓存事件]
L1-DCACHE店门柱[硬件缓存事件]
L1-dcache- prefetches [硬件缓存事件]
L1-dcache- prefetch门柱[硬件缓存事件]
L1-ICACHE-负载[硬件缓存事件]
L1-ICACHE负荷门柱[硬件缓存事件]
L1-icache- prefetches [硬件缓存事件]
L1-icache- prefetch门柱[硬件缓存事件]
LLC-负载[硬件缓存事件]
LLC负荷门柱[硬件缓存事件]
LLC-店[硬件缓存事件]
LLC店门柱[硬件缓存事件]
LLC- prefetches [硬件缓存事件]
LLC- prefetch门柱[硬件缓存事件]
DTLB-负载[硬件缓存事件]
DTLB负荷门柱[硬件缓存事件]
DTLB-店[硬件缓存事件]
DTLB店门柱[硬件缓存事件]
dTLB- prefetches [硬件缓存事件]
dTLB- prefetch门柱[硬件缓存事件]
ITLB-负载[硬件缓存事件]
ITLB负荷门柱[硬件缓存事件]
分支负载[硬件缓存事件]
分支负载门柱[硬件缓存事件]
节点负载[硬件缓存事件]
节点负载门柱[硬件缓存事件]
节点店[硬件缓存事件]
节点存储命中[硬件缓存事件]
于节点prefetches [硬件缓存事件]
于节点prefetch门柱[硬件缓存事件]
在哪里可以找到有关这些字段的解释？缓存未命中的事件总是比其他事件小。这是什么事件测量？
如何跨preT的26760 L1-ICACHE负载门柱的ls VS在下面的例子中5708缓存缺失？
PERF的统计-e L1-ICACHE负荷门柱LS
缓存缓存〜出 对于'ls'的性能计数器统计： 26760 L1-ICACHE负荷门柱 0.002816690秒时间已过PERF统计-e缓存缺失LS
缓存缓存〜出 对于'ls'的性能计数器统计： 5708缓存缺失 0.002822122秒时间已过
您似乎认为，在缓存缺失事件是所有其他类型的高速缓存未命中的总和（ L1-DCACHE负载门柱，等等）。这实际上是不正确的。
在缓存缺失事件再presents的，可以不受任何缓存送达内存访问的次数。
我承认这PERF的文档不在身边最好的。
然而，我们可以通过阅读（假设你已经有一个如何CPU和性能监控单元的工作，这显然不是一个计算机体系结构过程中良好的知识）的perf_event_open的文档学到了很多有关它（ ）功能：
<一个href=\"http://web.eece.maine.edu/~vweaver/projects/perf_events/perf_event_open.html\">http://web.eece.maine.edu/~vweaver/projects/perf_events/perf_event_open.html
例如，通过阅读它，你可以看到缓存缺失事件表明通过PERF列表对应于 PERF_COUNT_HW_CACHE_MISSES
I am trying to figure out why a modified C program is running faster than its non modified counter part (I am adding very few lines of code to perform some additional work). In this context, I suspect "cache effects" to be the main explanation (instruction cache). Thus I reach the perf (https://perf.wiki.kernel.org/index.php/Main_Page) profiling tool but unfortunately I am not able to understand the meaning of its outputs regarding cache misses.
Several events about cache are provided:
cache-references [Hardware event]
cache-misses [Hardware event]
L1-dcache-loads [Hardware cache event]
L1-dcache-load-misses [Hardware cache event]
L1-dcache-stores [Hardware cache event]
L1-dcache-store-misses [Hardware cache event]
L1-dcache-prefetches [Hardware cache event]
L1-dcache-prefetch-misses [Hardware cache event]
L1-icache-loads [Hardware cache event]
L1-icache-load-misses [Hardware cache event]
L1-icache-prefetches [Hardware cache event]
L1-icache-prefetch-misses [Hardware cache event]
LLC-loads [Hardware cache event]
LLC-load-misses [Hardware cache event]
LLC-stores [Hardware cache event]
LLC-store-misses [Hardware cache event]
LLC-prefetches [Hardware cache event]
LLC-prefetch-misses [Hardware cache event]
dTLB-loads [Hardware cache event]
dTLB-load-misses [Hardware cache event]
dTLB-stores [Hardware cache event]
dTLB-store-misses [Hardware cache event]
dTLB-prefetches [Hardware cache event]
dTLB-prefetch-misses [Hardware cache event]
iTLB-loads [Hardware cache event]
iTLB-load-misses [Hardware cache event]
branch-loads [Hardware cache event]
branch-load-misses [Hardware cache event]
node-loads [Hardware cache event]
node-load-misses [Hardware cache event]
node-stores [Hardware cache event]
node-store-misses [Hardware cache event]
node-prefetches [Hardware cache event]
node-prefetch-misses [Hardware cache event]
Where can I find explanation about these fields ? cache-misses event is always smaller than other events. What does this event measure ?
How to interpret the 26,760 L1-icache-load-misses for ls vs the 5,708 cache-misses in the following example ?
perf stat -e L1-icache-load-misses ls
caches caches~ out
Performance counter stats for 'ls':
26,760 L1-icache-load-misses
0.002816690 seconds time elapsed
perf stat -e cache-misses ls
caches caches~ out
Performance counter stats for 'ls':
5,708 cache-misses
0.002822122 seconds time elapsed
You seem to think that the cache-misses event is the sum of all other kind of cache misses (L1-dcache-load-misses, and so on). That is actually not true.
the cache-misses event represents the number of memory access that could not be served by any of the cache.
I admit that perf's documentation is not the best around.
However, one can learn quite a lot about it by reading (assuming that you already have a good knowledge of how a CPU and a performance monitoring unit work, this is clearly not a computer architecture course) the doc of the perf_event_open() function:
http://web.eece.maine.edu/~vweaver/projects/perf_events/perf_event_open.html
For example, by reading it you can see that the cache-misses event showed by perf list corresponds to PERF_COUNT_HW_CACHE_MISSES
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