是否有可能定义在makefile一个C宏？ [英] Is it possible to define a C macro in a makefile?

问题描述

是否有可能把的#define VAR 相当于（在C程序）到一个makefile文件，这样就可以控制该计划的一部分，应编译？

Is it possible to put the equivalent of #define VAR (in a C program) into a makefile, so that one can control which part of the program should be compiled?

推荐答案

因此​​在的Linux < CC 手册页/ p>

Accordingly to cc manpage on linux

-D name=definition
           The contents of definition are tokenized and processed as if they appeared during translation phase three in a #define directive.  In
           particular, the definition will be truncated by embedded newline characters.

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