多少字节做了至强带进每个内存访问缓存？ [英] How many bytes does a Xeon bring into the cache per memory access?
问题描述
我工作的系统，用C ++编写的，在Linux上的至强，需要尽可能快地运行运行。有一个在RAM中的一个大的数据结构（基本结构的数组），10 GB和它的元素需要定期访问。欲修改的数据结构尽可能多与系统的高速缓存机制来工作尽可能
I am working on a system, written in C++, running on a Xeon on Linux, that needs to run as fast as possible. There is a large data structure (basically an array of structs) held in RAM, over 10 GB, and elements of it need to be accessed periodically. I want to revise the data structure to work with the system's caching mechanism as much as possible.
目前，访问大多随机进行跨越结构，每一次读1-4的32位整数。这是一个很长一段时间在同一地点发生之前另一个读，所以没有从缓存中受益。
Currently, accesses are done mostly randomly across the structure, and each time 1-4 32-bit ints are read. It is a long time before another read occurs in the same place, so there is no benefit from the cache.
现在我知道，当你在RAM中的随机位置读取一个字节，远远不止这些字节进入缓存。我的问题是，有多少字节都带来了什么？它是16，32，64，4096？这是一个被称为高速缓存行？
Now I know that when you read a byte from a random location in RAM, more than just that byte is brought into the cache. My question is how many bytes are brought in? Is it 16, 32, 64, 4096? Is this called a cache line?
我期待重新设计数据结构，以尽量减少随机存取RAM和工作与缓存，而不是反对。明知道有多少字节被拉入缓存中的随机访问会通知设计选择我做。
I am looking to redesign the data structure to minimize random RAM accesses and work with the cache instead of against it. Knowing how many bytes are pulled into the cache on a random access will inform the design choices I make.
更新（2014年10月）：
我提出后不久，项目上面的问题被搁置。它已经恢复，并根据下面的答案建议，我周围的执行RAM访问一些实验，因为它似乎有可能TLB鞭打发生了什么。我修改了方案，以巨大的网页上运行（2MB而不是标准的4KB），并观察到一个小的提速，约2.5％。我发现了大约这里设立巨额页面和的这里。
推荐答案
今天的CPU中提取的（典型值）64字节，称为高速缓存行大块内存。当你阅读特定内存位置，整个高速缓存行是从主存储器到高速缓存中获取的。
Today’s CPUs fetch memory in chunks of (typically) 64 bytes, called cache lines. When you read a particular memory location, the entire cache line is fetched from the main memory into the cache.
这里更多：<一href=\"http://igoro.com/archive/gallery-of-processor-cache-effects/\">http://igoro.com/archive/gallery-of-processor-cache-effects/
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