使用没有makefile文件make命令? [英] Using the make command without makefiles?

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问题描述

我编译一些C code工作分配,我跑了做codeFILE,其中codeFILE是我的C程序的名称,即使我没有一个makefile文件,可执行文件被创建,它跑过去,工作正常。

I was compiling some C code for an assignment and I ran "make codeFile", where "codeFile" was the name of my C program, and even though I didn't have a makefile, an executable was created, and it ran and worked correctly.

有谁知道为什么这个工作?为什么让编译东西,即使我没有生成文件?我能找到的唯一的参考是这样的:
http://daly.axiom-developer.org/TimothyDaly_files/class5/node5.html

Does anyone know why this worked? Why does make compile something even if I don't have a makefile? The only reference I could find was this: http://daly.axiom-developer.org/TimothyDaly_files/class5/node5.html

推荐答案

请有几个pre定义的 潜规则。特别是,在你的情况,它使用了两个这样的规则,试图确定什么目标 codeFILE 做的时候:

Make has several pre-defined implicit rules. In particular, in your case, it uses two such rules when trying to determine what to do for the target codeFile:

%: %.o    # Link object file
    $(CC) $(LDFLAGS) n.o $(LOADLIBES) $(LDLIBS)

%.o: %.c  # Compile C source code
    $(CC) $(CPPFLAGS) $(CFLAGS) -c

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