为什么读 - 修改 - 写必要在嵌入式系统上登记？ [英] Why is Read-Modify-Write necessary for registers on embedded systems?

问题描述

我读<一个href=\"http://embeddedgurus.com/embedded-bridge/2010/03/different-bit-types-in-different-registers/\">http://embeddedgurus.com/embedded-bridge/2010/03/different-bit-types-in-different-registers/,其中说：

通过读/写位，固件套并在需要时清除位。它通常首先读取寄存器，修改所需的位，然后写入修改后的值回了

With read/write bits, firmware sets and clears bits when needed. It typically first reads the register, modifies the desired bit, then writes the modified value back out

和我都同时保持老在这里嵌入式盐家伙某些生产code codeD碰上consrtuct。我不明白为什么这是必要的。

and I have run into that consrtuct while maintaining some production code coded by old salt embedded guys here. I don't understand why this is necessary.

当我想设置/清除一下，我永远都只是或/与位掩码NAND。在我看来，这解决了所有线程问题，因为我假设设定（通过转让或带着面具的ORing）寄存器只需要一个周期。在另一方面，如果你先读寄存器，然后修改，然后写，中断读取之间发生的事情，写可能造成写入一个旧值到寄存器。

When I want to set/clear a bit, I always just or/nand with a bitmask. To my mind, this solves any threadsafe problems, since I assume setting (either by assignment or oring with a mask) a register only takes one cycle. On the other hand, if you first read the register, then modify, then write, an interrupt happening between the read and write may result in writing an old value to the register.

那么，为什么读 - 修改 - 写？是否仍有必要？

So why read-modify-write? Is it still necessary?

推荐答案

这一定程度上取决于您的特定嵌入式设备的架构。我举三个例子，涵盖了常见的情况。它的基本要点，但是，是从根本上CPU核心不能直接在I / O设备寄存器操作，除了读取和他们在一个字节或偶数字分段方式写

This depends somewhat on the architecture of your particular embedded device. I'll give three examples that cover the common cases. The basic gist of it, however, is that fundamentally the CPU core cannot operate directly on the I/O devices' registers, except to read and write them in a byte- or even word-wise fashion.

1）68HC08系列，一个8位自包含微控制器。

1) 68HC08 series, an 8-bit self-contained microcontroller.

这包括一个位设置和位清零指令。这些，如果你仔细阅读说明书，其实内部由自己执行读 - 修改 - 写周期。他们确实有被原子操作的优势，因为单指令不能被中断。

This includes a "bit set" and a "bit clear" instruction. These, if you read the manual carefully, actually internally perform a read-modify-write cycle by themselves. They do have the advantage of being atomic operations, since as single instructions they cannot be interrupted.

您还会注意到，他们采取不是单独的读长或写指令，但更短的时间比使用作业三条指令（见下文）。

You will also notice that they take longer than individual read or write instructions, but less time than using three instructions for the job (see below).

2）ARM和PowerPC，传统的32位RISC处理器（通常在高端微控制器中太）。

2) ARM or PowerPC, conventional 32-bit RISC CPUs (often found in high-end microcontrollers too).

这不包括的既能存取存储器，并立即进行计算（在和/或）任何的说明。如果你用C写的：

These do not include any instructions which can both access memory and perform a computation (the and/or) at once. If you write in C:

*注册| = 0X40;

它变成如下因素组件（此PowerPC的例子中，R8包含寄存器地址）：

it turns into the folowing assembly (for this PowerPC example, r8 contains the register address):

LBZ r4,r8
ORI r4,r4,#0x40
STB r4,r8

由于这是多个指令，它不是原子，并且它可以被中断。使其原子甚至SMP安全是超出了这个答案的范围 - 有它特别说明和技巧

Because this is multiple instructions, it is NOT atomic, and it can be interrupted. Making it atomic or even SMP-safe is beyond the scope of this answer - there are special instructions and techniques for it.

3）IA32（86）和AMD64。为什么要使用这些为嵌入我是无法理解的，但他们是另外两个例子之间的中途宿舍。

3) IA32 (x86) and AMD64. Why you would use these for "embedded" is beyond me, but they are a half-way house between the other two examples.

我忘了是否有单指令的内存位设置和位明确在x86。如果没有，则见RISC节以上，它只是只有两个指令而不是三个，因为86可以加载并在一个指令修改。

I forget whether there is a single-instruction in-memory bit-set and bit-clear on x86. If not, then see the RISC section above, it just takes only two instructions instead of three because x86 can load and modify in one instruction.

假设有这样的说明，它们也的需要在内部加载和存储寄存器以及修改它。现代版本将explcitly打破指令进入内部三个类似RISC的操作。

Assuming there are such instructions, they also need to internally load and store the register as well as modifying it. Modern versions will explcitly break the instruction into the three RISC-like operations internally.

古怪的是，86（不同于HC08）可以在存储器总线上的事务中间由总线主控打断，而不仅仅是传统的CPU中断。所以，你可以手动添加一个LOCK preFIX到需要做多个存储器周期来完成，因为在这种情况下的指令。你不会，虽然从纯C得到此。

The oddity is that x86 (unlike the HC08) can be interrupted on the memory bus in mid-transaction by a bus master, not just by a conventional CPU interrupt. So you can manually add a LOCK prefix to an instruction that needs to do multiple memory cycles to complete, as in this case. You won't get this from plain C though.

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