英特尔的x64指令CMPSB / CMPSW / CMPSD / CMPSQ [英] Intel x64 instructions CMPSB/CMPSW/CMPSD/CMPSQ

问题描述

这些指令是英特尔手册的558页上。我得到的总的想法，但我卡在这些指令的确切encdoding。以下是我的理解，请纠正我，如果我错了。这是所有在64位模式

 欧普code  - 指令：
A6  - 地址RSI与字节地址RDI比较字节
67 A6  - 地址ESI与字节地址EDI比较字节

66 A7  - 地址RSI与字地址RDI比较字
67 66 A7  - 地址ESI与字地址EDI比较字

A7  - 地址RSI与DWORD地址RDI比较DWORD
67 A7  - 地址ESI与DWORD地址EDI比较DWORD

REX.W A7  - 比较四字地址RSI与四字地址RDI
67 REX.W A7  - 比较四字地址ESI与四字地址EDI
 

解决方案

在谈到什么样的指令是，我们必须认识到，他们帮助程序员使自动化的字符串（在连续的存储元件的意思）比较，这样三件事是完成

1. 在两个存储位置，不能用单个 CMP 指令进行比较

2. 比较影响的标志，这样就可以检查结果右侧的下一个指令，或者只是使用代表 / REPNZ preFIX循环，除非在一定条件没有得到满足。

3. 这两个源操作数，根据东风，否则将必须由至少两个 INC / 月或添加 / 子指令，后者所需的业务更多的只是一个字节

您也已经显示在指令编码的兴趣。首先， cmpsx 指令可以连接codeD在两个方面 - 有或没有指定的操作。这可能是特别有用的，虽然有一些限制。

其他的事情都只是在玩弄preFIX字节。到这只是注意，您可以覆盖使用跨段preFIX第一源操作数的段，但你不能覆盖 ES 作为段第二个操作数。

These instructions are on page 558 of the intel manual. I get the general idea but I'm stuck on the exact encdoding of these instructions. Here is what I understand, please correct me if I'm wrong. This is all in 64-bit mode.

Opcode - Instruction: 
A6 - compare byte at address RSI with byte at address RDI
67 A6 - compare byte at address ESI with byte at address EDI

66 A7 - compare word at address RSI with word at address RDI
67 66 A7 - compare word at address ESI with word at address EDI

A7 - compare dword at address RSI with dword at address RDI
67 A7 - compare dword at address ESI with dword at address EDI

REX.W A7 - Compares quadword at address RSI with quadword at address RDI
67 REX.W A7 - Compares quadword at address ESI with quadword at address EDI

解决方案

Speaking of what those instructions are for, one must realize that they help a programmer automatize string (in the meaning of consecutive memory elements) comparison so that three things are done

1. Comparison between two memory location, which can't be done with a single cmp instruction

2. Comparison affecting flags, so that you can check the result right in the next instruction, or just use the rep/repnz prefix to loop unless a certain condition is not met.

3. Incrementation/Decrementation of both source operands according to DF, which would otherwise have to be done by at least two inc/dec or add/sub instructions, with the latter required for operations on more that just one byte

You've also shown some interest in instruction encoding. In the first place, cmpsx instructions can be encoded in two ways - with or without specified operands. This may be particularly useful, although there are some limitations.

Other things are just playing with prefix bytes. Onto this just note, that you can override the segment of the first source operand using the segment override prefix, but you can't override the es as the segment of the second operand.

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