更改旧的makefile系统以利用并行编译 [英] Change older makefile system to take advantage of parallel compiles

问题描述

我们使用Microsoft NMAKE编译大量的本机C ++和一些Intel Fortran文件。通常，makefiles包含这样的行（对于每个文件）：

We use Microsoft NMAKE to compile a large number of native C++ and some Intel Fortran files. Typically the makefiles contains lines such as this (for each file):

$（LINKPATH）\olemisc.obj：ole2\olemisc.cpp $（OLEMISC_DEP）< br>
$（CCDEBUG）ole2\olemisc.cpp

$（GDEPS）ole2\olemisc.cpp

$(LINKPATH)\olemisc.obj : ole2\olemisc.cpp $(OLEMISC_DEP)
$(CCDEBUG) ole2\olemisc.cpp
$(GDEPS) ole2\olemisc.cpp

OLEMISC_DEP = \

e：\ole2\ifaceole.hpp \

e：\ole2\cpptypes.hpp\

等。

OLEMISC_DEP =\
e:\ole2\ifaceole.hpp\
e:\ole2\cpptypes.hpp\
etc.

它工作正常，但一次编译一个文件。我们希望利用多核处理器，并一次编译多个文件。我会感激一些建议，最好的方式，使这一切发生，请。这是我到目前为止。

It works fine, but compiles one file at a time. We would like to take advantage of multi core processors and compile more than one file at a time. I would appreciate some advice about the best way to make that happen, please. Here is what I have so far.

一： GNU make允许您使用--jobs = 2选项执行并行作业，这与GCC工作正常（我们不能使用GCC可悲）。但是微软的NMAKE似乎不支持这样的选择。两个名称程序的兼容性如何，如果我们开始使用GNU MAKE，您能同时运行两个cl.exe进程吗？我希望他们抱怨PDB（调试）文件被锁定，或者有一个更新的cl.exe命令行参数让你这么做？

One: GNU make lets you execute parallel jobs using the --jobs=2 option for example and that works fine with GCC (we cant use GCC sadly). But Microsoft's NMAKE does not seem to support such an option. How compatible would the two name programs be, and if we did start using GNU MAKE, can you run two cl.exe processes at the same time? I would expect them to complain about the PDB (debug) file being locked, or does one of the newer cl.exe command line arguments get you around that?

Two： cl.exe有一个/ MP（使用多个进程构建）标志，它允许您通过命令行传递到同一时间同时编译多个文件，例如：

Two: cl.exe has a /MP (build with multiple processes) flag, which lets you compile multiple files at the same time if passed together via the command line, for example:

cl / MP7 a.cpp b.cpp c.cpp d.cpp e.cpp

cl /MP7 a.cpp b.cpp c.cpp d.cpp e.cpp

但是使用这将需要更改makefile 。我们的make文件是由我们自己的程序从其他文件生成的，所以我可以很容易地改变我们放在makefile。但是如何将不同cpp文件的依赖关系在makefile中组合在一起，以便通过一个cl.exe调用将它们编译在一起？每个.obj是一个不同的目标与一组命令，使它吗？

But using this would require changes to the makefile. Our make files are generated by a our own program from other files, so I can easily change what we put in the makefiles. But how do you combine the dependencies from different cpp files together in the makefile so they get compiled together via one cl.exe call? Each .obj is a different target with a set of commands to make it?

或者我更改makefile不调用cl.exe，而是一些其他小可执行文件我们写，然后收集一系列的.cpp文件在一起和shell出去cl.exe传递多个参数？这将工作，似乎是可行的，但也似乎过于复杂，我不能看到任何其他人这样做。

Or do I change the makefile to not call cl.exe, but rather some other little executable that we write, which then collects a series of .cpp files together and shells out to cl.exe passing multiple arguments? That would work and seems doable, but also seems overly complicated and I cant see anyone else doing that.

我缺少明显的东西吗？必须有一个更简单的方法来完成这个？

Am I missing something obvious? There must be a simpler way of accomplishing this?

我们不使用Visual Studio或解决方案文件来做编译，因为文件列表是广泛的，我们有在我们的makefile中的一些特殊项目，理论上不想过分依赖MS C ++等。

We do not use Visual Studio or a solution file to do the compiles, because the list of files is extensive, we have a few special items in our makefiles, and theoretically do not want to be overly tied to MS C++ etc.

推荐答案

GNU在窗口。我倾向于使用cygwin make，因为它创建的环境往往可以非常移植到类Unix平台（Mac和Linux作为开始）。编译使用Microsoft工具链，并行和100％准确依赖和CPU使用工作非常好。您还有其他要求。

I thoroughly recommend GNU make on windows. I tend to use cygwin make as the environment it creates tends to be very portable to Unix-like platforms (Mac and Linux for a start). Compiling using the Microsoft toolchain, in parallel and with 100% accurate dependencies and CPU usage works very well. You have other requirements though.

至于您的 nmake 问题，请查看 批处理模式推理规则 。基本上，nmake能够调用一次C编译器，一次传递一个C文件的整个负载。因此，您可以使用编译器的 / MP ... 类型开关。

As far as your nmake question goes, look up batch-mode inference rules in the manual. Basically, nmake is able to call the C compiler once, passing it a whole load of C files in one go. Thus you can use the compiler's /MP... type switches.

编译器内置的并行编译？ Pah！可怕的打破我说。这里是一个框架：

Parallel compiling built into the compiler? Pah! Horribly broken I say. Here is a skeleton anyway:

OBJECTS = a.obj b.obj c.obj
f.exe: $(OBJECTS)
    link $** -o $@

$(OBJECTS): $$(@R).c

# "The only syntactical difference from the standard inference rule
# is that the batch-mode inference rule is terminated with a double colon (::)."
.c.obj::
    cl -c /MP4 $<

EDIT

如果每个 .obj 有自己的依赖关系（可能！），那么您只需将它们添加为单独的依赖行（即，它们没有附加任何shell命令） 。

If each .obj has its own dependencies (likely!), then you simply add these as separate dependency lines (i.e., they don't have any shell commands attached).

a.obj: b.h c.h ../include/e.hpp
b.obj: b.h ../include/e.hpp
    ∶

这种锅炉板通常由另一个工具生成， ！INCLUDE d进入主makefile。如果你聪明，那么你可以在编译时免费生成这些依赖项。 （如果你走得很远，那么 nmake 开始在接缝处吱吱作响，你应该改成GNU make。）

Often such boiler plate is generated by another tool and !INCLUDEd into the main makefile. If you are clever, then you can generate these dependencies for free as you compile. (If you go this far, then nmake starts to creak at the seams and you should maybe change to GNU make.)

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