有没有在x86任何指令加速SHA（SHA1 / 2/256/512）编码？ [英] Are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding?
问题描述
例如，在 x86是指令集硬件加速AES 。但是有没有在x86的任何指令加速SHA（SHA1 / 2/256/512）编码，什么库是编码xa上的SHA的能力？
An example, in x86 are Instruction Set to hardware acceleration AES. But are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding, and what library is the fastet to encoding SHA on x86?
推荐答案
在x86中是否有任何指令来加速SHA（SHA1 / 2/256/512）编码？
Are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding?
它的2016年11月，答案终于是。但它唯一的SHA1和SHA256（和扩展名，SHA-224）。
Its November 2016 and the answer is finally Yes. But its only SHA1 and SHA256 (and by extension, SHA-224).
具有SHA扩展功能的Intel CPU最近才上市。看起来支持它的处理器是 Goldmont微架构：
- Pentium J4205（桌面）
- Pentium N4200（手机）
- Celeron J3455
- Celeron J3355（桌面）
- Celeron N3450（手机）
- Celeron N3350 li>
- Pentium J4205 (desktop)
- Pentium N4200 (mobile)
- Celeron J3455 (desktop)
- Celeron J3355 (desktop)
- Celeron N3450 (mobile)
- Celeron N3350 (mobile)
我通过亚马逊的产品查看架构或处理器编号的机器，但我没有找到任何可用的机器。我相信惠普宏碁有一台笔记本电脑与奔腾N4200预计将在2016年11月 2016年12月 2016年将满足测试需要。
I looked through offerings at Amazon for machines with the architecture or the processor numbers, but I did not find any available (yet). I believe HP Acer had one laptop with Pentium N4200 expected to be available in November 2016 December 2016 that would meet testing needs.
对于一些技术性的原因，为什么它只有SHA-1，SHA-224和SHA-256，然后看到 crypto：arm64 / sha256 - 在内核crypto邮件列表上添加对使用NEON指令的SHA256的支持。简单的答案是，在SHA-256之上，事情不容易并行化。
For some of the technical deatils why its only SHA-1, SHA-224 and SHA-256, then see crypto: arm64/sha256 - add support for SHA256 using NEON instructions on the kernel crypto mailing list. The short answer is, above SHA-256, things are not easily parallelizable.
内在函数和ARMv8 SHA内在函数在 Noloader GitHub | SHA-Intrinsics 。它们是C源文件，并为SHA-1，SHA-224和SHA-256提供压缩功能。基于固有的实现将SHA-1的吞吐量提高约3x到4x，为SHA-224和SHA-256提高约6x到12x。
You can find source for both Intel SHA intrinsics and ARMv8 SHA intrinsics at Noloader GitHub | SHA-Intrinsics. They are C source files, and provide the compress function for SHA-1, SHA-224 and SHA-256. The intrinsic based implementations increase throughput approximately 3x to 4x for SHA-1, and approximately 6x to 12x for SHA-224 and SHA-256.
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