包含或包含自动生成的依赖关系? [英] To include or -include auto-generated dependencies?
问题描述
我喜欢使用 g ++ -MM
功能自动构建我的依赖关系。我这样做的方式如下:
pre $ include $(ALLOBJ:%。o =%。d)
%.d:%.cxx
@echo使$<依赖关系
@ g ++ -MM $(CXXFLAGS)$< -o $ @
@sed -i's,$ * \.o,& $ @,g'$ @
基本上我可以给这个规则 ALLOBJ
,它会:
- 转换每个
.o
名称转换为.d
名称和包含
它, - 找不到
.d
,它会从.cxx
文件
-
%。d:%.cxx
规则的最后一行将添加.d
文件添加到文件本身,以便依赖项自动更新。
-
当我删除一个标题时,问题就出现了: .d
文件仍然期望找到它,当它不存在时,make会不高兴。一种解决方案是用 -include
替换 include
,并在编译规则中构建依赖关系。不幸的是,这需要每个编译规则的依赖关系生成线,并且还会忽略所有其他的 include
错误(这看起来有风险)。有没有其他简单的方法来自动构建依赖关系,从而避免此问题?
include $(ALLOBJ:%。o =%。d)
%.d:%.cxx
@ echo为$<<<
@ g ++ -MM -MP -MT $ *。d -MT $ *。$ $(CXXFLAGS)$< -o $ @
汇总标志:
-MM
:构建依赖关系(而不是编译)
-MP
:为所有标题生成'dummy'目标。这可以防止在标题被删除并因此无法找到时发出抱怨。
-MT
:指定规则的目标。这允许我们告诉make .d
文件取决于头部,而不使用丑陋的sed规则。
我不认为我的解决方案比@ Beta解决方案更正确。我倾向于在同一个makefile中为C ++文件使用多个编译规则,因此对于所有这些文件,只有一个依赖关系规则比在每个编译规则中生成依赖关系稍微简洁一些(在我的情况下)。
I like to use the g++ -MM
feature to auto-build my dependencies. The way I do this is as follows:
include $(ALLOBJ:%.o=%.d)
%.d: %.cxx
@echo making dependencies for $<
@g++ -MM $(CXXFLAGS) $< -o $@
@sed -i 's,$*\.o,& $@ ,g' $@
Basically I can give this rule ALLOBJ
, and it will:
- convert every
.o
name to a.d
name, andinclude
it, - when it can't find a
.d
, it will create it from the.cxx
file- the final line of the
%.d: %.cxx
rule will add the name of the.d
file to the file itself, so that the dependency will be updated automatically.
- the final line of the
The issue arises when I remove a header: the .d
file still expects to find it, and make will get upset when it's not there. One solution is to replace include
with -include
, and to build the dependencies within the compile rule. Unfortunately this requires a dependency generation line for each compile rule, and will also ignore all other include
errors (which seems risky). Is there some other simple way to auto-build dependencies which avoids this issue?
Reading the g++ manual a bit more, and thanks to @jackKelly and @Beta's responses above, I found the following solution:
include $(ALLOBJ:%.o=%.d)
%.d: %.cxx
@echo making dependencies for $<
@g++ -MM -MP -MT $*.d -MT $*.o $(CXXFLAGS) $< -o $@
To summarize the flags:
-MM
: build dependencies (rather than compiling)-MP
: build 'dummy' targets for all headers. This prevents make from complaining when headers are deleted and thus can't be found.-MT
: specify the targets for the rule. This allows us to tell make the.d
file depends on the headers without resorting to the ugly sed rule.
I don't believe my solution is any more correct than @Beta's solution. I tend to use multiple compile rules for C++ files in the same makefile, so having a single dependency rule for all of them is slightly cleaner (in my case) than generating the dependencies in each compile rule.
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