如何在不重复代码的情况下将接口绑定到多个端口? [英] How to bind an interface to multiple ports without duplicating code?
问题描述
在此示例中,如何创建可以为模块的两个端口重用的单个接口绑定语句:
In this example, how do I create a single interface bind statement that can be reused for both ports of the module:
module adderSubtractor2(
input clk,
input [7:0] a0,
input [7:0] b0,
input doAdd0, // if this is 1, add; else subtract
output reg [8:0] result0
`ifdef HAS_UNIT_2
,
input [7:0] a1,
input [7:0] b1,
input doAdd1, // if this is 1, add; else subtract
output reg [8:0] result1
`endif
);
// ...
endmodule
interface adderSubtractor_if(
input bit clk,
input [7:0] a,
input [7:0] b,
input doAdd,
input [8:0] result
);
// ...
endinterface: adderSubtractor_if
// BIND STATEMENT(S) HERE
// The test that will be run on the DUT
program automatic test(adderSubtractor_if addSub);
initial begin
// do stuff with interface
end
endprogram // test
// The top level testbench.
module testbench;
reg clk;
adderSubtractor2 dut(.clk (clk));
test test0(dut.adderSubtractor_if0);
`ifdef HAS_UNIT_2
test test1(dut.adderSubtractor_if1);
`endif
// ...
endmodule // testbench
推荐答案
我相信您正在寻找的是可参数化的界面。
I believe that what you're looking for is parametrizable interface.
一般情况下,屏蔽端口`ifdef风险很大,你必须有充分的理由这样做。关于这个主题的讨论已经这里。
In general, masking ports with `ifdef is very risky, and you must have very good reasons to do this. There has already been a discussion on this topic here.
我认为没有理由在你的情况下使用`ifdef。您可以:
I don't see any reason to use `ifdef in your case. You can:
- 定义参数NUM_OF_INSTANCES
-
定义所有(clk和rst除外) )模块的端口作为压缩数组。 ie
- define a parameter NUM_OF_INSTANCES
define all (except clk and rst) the ports of your module as packed arrays. i.e.
输入[1:NUM_OF_INSTANCES] [7:0] a;
input [1:NUM_OF_INSTANCES][7:0] a;
使用生成 for模块内部用于实例化多个加法器的语句
use "generate for" statement inside the module to instantiate multiple adders
希望这会有所帮助。
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