Make:循环依赖下降了C ++ [英] Make: circular dependency dropped c++

问题描述

我基于GNU创建了一个makefile.制作本教程:

I created a makefile based on the GNU Make the tutorial: https://www.gnu.org/savannah-checkouts/gnu/make/manual/html_node/index.html#SEC_Contents.

make文件在初始make上工作正常，但是如果更改了文件并运行了make，则会出现循环依赖项丢弃消息，并且它不会生成更改的文件.删除的依赖项为bin/main.o< -bin/main.o.这是有道理的，因为main.o不应依赖main.o.我搜索了多个站点，包括stackoverflow，并找到了一些有用的答案，但是我无法解决我的问题.这两个链接与我的问题最相关: 将文件导出.o文件导出到其他文件比.cpp 和 Makefile循环依赖错误

The make file works fine on initial make, but if a file is changed and make is ran there is a circular dependency dropped message and it does not build the changed file. The dropped dependency is bin/main.o <-bin/main.o. This makes sense as main.o should not depend on main.o. I searched several sites, including stackoverflow and found some useful answers, but I have not been able to resolve my issue. These two links were the most relevant to my issue: Makefile export .o file to a different path than .cpp and Makefile circular dependency error

基于以上信息，我编辑了我的makefile，至少现在我可以更轻松地进行调试.依赖关系问题可能与通配符扩展后的后续目标和先决条件有关，但我只是没有看到它.

Based on the above information I edited my makefile and at least now I can debug easier. The dependency issue probably has to do with the subsequent target and prerequisite after wildcard expansion, but I am just not seeing it.

这是我的makefile:

Here is my makefile:

#For compilation

CC=g++
CC_FLAGS= -g -Wall -Werror -ansi -pedantic

#make[1]: main.o all <- all

#Folder structure
BIN_DIR:=bin
SRC_DIR:=src
H_DIR:=src/header

all:rshell

#VPATH = $(SRC_DIR) 

H_FILES:=$(wildcard $(H_DIR)/*.h)
DEPS:$(wildcard $(BIN_DIR)/*.d)


CPP_FILES:=$(wildcard $(SRC_DIR)/*.cpp)

OBJECTS := $(CPP_FILES:$(SRC_DIR)/%.cpp=$(BIN_DIR)/%.o)

$(BIN_DIR)/%.o: $(SRC_DIR)/%.cpp $(H_DIR)/%.h
    mkdir -p $(BIN_DIR)
    $(CC) -I$(H_DIR) -o $@ -c $< $(CC_FLAGS)

$(BIN_DIR)/main.o:$(SRC_DIR)/main.cpp $(OBJECTS) $(H_FILES)
    $(CC) -I$(H_DIR) -o $@ -c $(SRC_DIR)/main.cpp $(CC_FLAGS)

rshell: $(OBJECTS)
    $(CC) -o $(BIN_DIR)/$@ $(OBJECTS) $(CC_FLAGS)

include $(DEPS)

$(MAKEFILE_LIST): ;
%:: %,v
%:: RCS/%,v
%:: RCS/%
%:: s.%
%:: SCCS/s.%

.PHONY: clean

clean:
    rm -rf $(BIN_DIR)

问题1:如果通配符扩展引起循环依赖，我该如何解决?

Question1: If the wildcard expansion is causing the circular dependency, how could I fix?

问题2:如何跟踪通配符扩展?回显文件名并以这种方式跟踪是否正确?运行make -d很有用，但是我没有看到如何避免它.我的假设是这些行引起了循环依赖:

Question2: How does one trace wildcard expansion? Would it be correct to echo the names of the files and trace that way? Running make -d was useful, but I am not seeing how to avoid it. My assumption is these lines are causing the circular dependencies:

$(BIN_DIR)/main.o:$(SRC_DIR)/main.cpp $(OBJECTS) $(H_FILES)
    $(CC) -I$(H_DIR) -o $@ -c $(SRC_DIR)/main.cpp $(CC_FLAGS)

感谢您的帮助和见识.

推荐答案

$(BIN_DIR)/main.o:$(SRC_DIR)/main.cpp $(OBJECTS) $(H_FILES)

在这行中，您说要构建main.o，我需要main.cpp * .h和* .o

On this line you say to build main.o , I need main.cpp *.h and *.o

但是* .o具有main.o，因此您可以根据main.o编写main.o.只需删除不需要对象的$(OBJECTS)即可构建对象.

But *.o has main.o so you write main.o depend of main.o. Just remove $(OBJECTS) you don't need object to build a object.

$(BIN_DIR)/main.o:$(SRC_DIR)/main.cpp $(H_FILES)

不要使用通配符，最好是显式显示源文件.不要将CC用于c ++编译器，标准使用CXX.

Don't use wildcard, it's better to explicit your sources files. Don't use CC for c++ compiler, the standard use CXX.

Makefile的示例:

exemple of Makefile:

NAME    =   foo

CXX     ?=  g++

RM      =   rm

DEBUG   ?=  no

LEVEL   ?=  3

LIB     =   -l m

INCLUDE     =   -I include

CXXFLAGS    +=  -Wall -Wextra -O$(LEVEL)
CXXFLAGS    +=  -ansi -pedantic -std=c++11
CXXFLAGS    +=  $(INCLUDE)

ifeq ($(CXX), clang++)
CXXFLAGS    +=  -Weverything
endif

ifneq ($(DEBUG), no)
CXXFLAGS    +=  -g
endif

LDFLAGS     =   $(LIB)

ifeq ($(DEBUG), no)
LDFLAGS     +=  -s
endif

SRC     =   main.cpp
SRC     +=  foo.cpp

DPD     =   $(SRC:.cpp=.dpd)

OBJ     =   $(SRC:.cpp=.o)

all     :   $(NAME)

$(NAME) :   $(OBJ)
            $(CXX) $(OBJ) -o $(NAME) $(LDFLAGS)

clean   :
            $(RM) -f $(OBJ)
            $(RM) -f $(DPD)

fclean  :   clean
            $(RM) -f $(NAME)

re      :   fclean
            $(MAKE) -C .

%.dpd   :   %.cpp
            $(CXX) -MM $(<) -o $(@) $(CXXFLAGS) -MT $(<:.cpp=.o)

%.o     :   %.cpp
            $(CXX) -c $(<) -o $(@) $(CXXFLAGS)

.PHONY      :   all clean fclean re %.dpd %.o

.SUFFIXES   :   .o.cpp .dpd.cpp

include $(DPD)

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