对于Makefile变量中的每个目标 [英] For each on target of Makefile variable

问题描述

我有一个如下所示的makefile

I've makefile which looks like follows

apps = app1 app2 app3

all: dir app1 app2 app3 zip cleanup

现在我想对apps变量列表

类似

`loop on apps

endloop`

makefile中是否可以在其上循环，我需要在apps变量列表上进行循环

Is it possible in makefile to loop on it, I need to do loop on apps varible list

更新

让我说这个变量(apps)是由我的程序在make文件中生成的，该变量为每个项目提供不同的应用值，有时是apps= app1 app2有时是，有时可能是20个或更多apps= app1 app2 appN

lets say this variable(apps) is generated by my program in the make file, which provide for each project diffrent values of apps, sometimes its apps= app1 app2 sometimes its apps= app1 and sometimes can be 20 apps or more apps= app1 app2 appN

如何迭代apps变量并执行某些操作，例如在每次迭代中打印如下内容:

How can I iterate on apps varible and do something, for example in each iteration print something like:

now im in `app1`
now im in `app2`
etc

尝试以下操作

.PHONY: foo
all: foo
APPS = app1 app2 app3 app4
foo : $(APPS)
    for $$f in $(APPS); do echo $$f is here; done

我遇到以下错误:

make: *** No rule to make target app1'，foo'. Stop.

推荐答案

我看到你来回走了一点，所以让我发表评论可能会或可能不会有帮助.

I see you've gone back and forth a bit, so let me just make a comment which may or may not help.

通常，您不会在make配方中编写循环，因为make本身提供了循环".因此，当您编写如下规则时:

In general you don't write loops inside make recipes, because make itself provides "looping". So when you write a rule like:

all: app1 app2 app3 app4

make将尝试一次构建其中的每个先决条件.因此，如果您希望有一个makefile为apps变量中的每个条目回显一行，则可以这样做:

make will try to build each one of those prerequisites, one at a time. So if you wanted to have a makefile that echoed a line for each entry in the apps variable you would do it like this:

all: $(apps)

$(apps):
        @echo $@

这告诉make从目标all开始，并尝试构建"其每个前提条件，这些前提条件是apps变量中的值.

This tells make to start with a target all and try to "build" each of its prerequisites which are the values in the apps variable.

然后，您定义了有关如何构建应用程序的规则，对于每个应用程序，您都说该规则为echo $@，其中$@是

Then you define a rule for how to build the apps, and for each one you say that the rule is echo $@ where $@ is an automatic variable that expands to the currently-building target.

在制造中，语法为:

foo bar biz:
        some command

是写作的简写并且与之相同:

is shorthand for, and identical to, writing:

foo:
        some command
bar:
        some command
biz:
        some command

编写makefile的关键是，您认为如何编写规则以从零个或多个前提文件中创建一个一个文件(目标).然后让您担心如何将所有这些先决条件连接在一起并正确订购它们.

The crucial thing when writing makefiles is that you think how to write a rule to create one file (target) from zero or more prerequisite files. Then you let make worry about how to connect all those prerequisites together and order them properly.

ETA 如果要对$(apps)变量中包含的长列表中的一个特定目标使用特殊规则，则可以执行以下操作:

ETA If you want a special rule for one particular target in a long list held in the $(apps) variable, you can do this:

$(filter-out bar,$(apps)):
        @echo print $@

bar:
        some other command

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