ARM过程调用标准中的r12 [英] r12 in the ARM Procedure Call Standard

问题描述

为什么根据ARM Procedure Call Standard将r12指定为暂存寄存器?它位于两组保留的寄存器之间:r4-r11和sp-lr-pc.为什么不将r0-r4临时设置，并保留其他所有内容?

Why is r12 designated as scratch register according to the ARM Procedure Call Standard? It sits right between two groups of preserved registers: r4-r11 and sp-lr-pc. Why not make r0-r4 temporary and all else preserved?

推荐答案

请注意，ARM具有STM和LDM指令，它们以数字增/减顺序存储和加载值.寄存器R0-R3用作参数和返回值，并在需要时进行调用方保存".寄存器R4-R8是被调用者保存的寄存器(可能还有更多).同样，R13-R15是特殊寄存器. R12的使用使LDM/STM可以相当有效地访问寄存器组，因为您可能希望以不同的方式对待组(上下文保存，函数调用，信号等都具有不同的要求).

Note that the ARM has STM and LDM instructions which store and load value in a numerically increasing/decreasing order. The registers R0-R3 are used as parameters and return values and are 'caller-saved' if needed. The registers R4-R8 are callee-saved registers (and maybe more). As well, R13-R15 are special registers. The use of R12 allows groups of registers to be accessed fairly efficiently with LDM/STM as you may want to treat groups differently (context save, function call, signal, etc. all have different requirements).

函数结尾和序言代码可能需要运行计算和/或保存值.为此需要一个暂存器.因此，在给定LDM/STM和其他ARM寻址模式的情况下，暂存寄存器不应破坏连续序列.您可能需要根据上下文和代码生成策略来保存/恢复调用者和被调用者保存的寄存器.在R4休息不是一个好选择.影响最小的自然中断是在被调用方和上层内部寄存器(PC，SP，LR)之间.请注意，取决于先前的

Function epilogue and prologue code may need to run calculations and/or save values. A scratch register is needed for this. So, given LDM/STM and other ARM addressing modes, the scratch register should NOT break continuous sequences. You may need to save/restore both caller and callee saved registers depending on context and code generation strategies. Having a break at R4 is not a good option. A natural break with least impact is between callee and upper intrinsic registers (PC,SP,LR). Note that R9-R11 can be special registers depending on the system (static base, stack extents, and frame pointer) in the prior APCS. As these are optional, in some systems they maybe saved as per R4-R8.

为什么根据ARM Procedure Call Standard将r12指定为暂存寄存器?

Why is r12 designated as scratch register according to the ARM Procedure Call Standard?

为什么是一个非常棘手的问题.鉴于不为类似功能使用连续寄存器会使事情复杂化.记住起来也容易得多，并且通过某些ARM指令也可以提供更大的灵活性.同样，代码生成的实现可能更简单，因为您只需要保存一个上限即可知道被调用者保存的寄存器.目标是使功能结尾/序言尽可能快.这取决于功能和系统要求.希望为什么需要暂存寄存器是显而易见的.如果没有多个堆栈保留，基于参数的可变大小数组将很难实现.诸如信号之类的某些代码可能依赖FP在序幕中被自动设置.即，您在函数中设置了堆栈和框架指针，或者您没有中间设置的指针. IP(r12)对于单板和其他链接技巧(PLT，GOT等)也很有用. R12的选择允许某些系统将R9-R11用作被调用方保存的通用寄存器，而不会破坏任何相似寄存器的顺序.

WHY is a very tough question. Given that it would complicate things not to use consecutive registers for similar functionality. It is also much easier to remember and does give more flexibility with some ARM instructions. Also the implementation of code generation is possibly simpler as you only need to save an upper limit to know callee-saved registers. A goal was to make function epilogue/prologue as fast as possible. This differs depending on function and system requirements. Hopefully why a scratch register is needed is obvious. Variable sized arrays based on parameters would be difficult to implement without multiple stack reservations. Some code such as signals may rely on FP to be atomically set during a prologue; Ie, you are in the function with stack and frame pointer set or you are not with no in-between. An IP (r12) is also useful for veneers and other linkage tricks (PLT,GOT,etc). The choice of R12 allows some systems to use R9-R11 as callee-saved general purpose registers without disrupting any sequence of similar registers.

从APCS，

仅在函数调用期间ip寄存器才具有专用作用；在其他时候，它可以用作暂存器.

The ip register has a dedicated role only during function call; at other times it may be used as a scratch register.

(除了:通常，编译器代码生成器将ip用作/a本地代码生成器的临时寄存器).

(Aside: Conventionally, ip is used by compiler code generators as the/a local code generator temporary register).

不幸的是，APCS被APCS淘汰了，因此ARM不再提供它了(很难找到网络参考).但是，它可以洞察ARM ABI的发展.

Unfortunately, the APCS is obsoleted by the AAPCS so ARM does not provide it anymore (web references are hard to find). However, it gives in-sight into the evolution of the ARM ABI.

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