与高速缓存预取提示相反 [英] Opposite of cache prefetch hint

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问题描述

是否可以在代码中放入提示,提示应从缓存中删除行?与预取提示相反,该提示表明我很快将需要一行.就我而言,我知道什么时候不需要一线了,所以我希望能够摆脱它,以腾出空间容纳我需要的线.

Is there a hint I can put in my code indicating that a line should be removed from cache? As opposed to a prefetch hint, which would indicate I will soon need a line. In my case, I know when I won't need a line for a while, so I want to be able to get rid of it to free up space for lines I do need.

推荐答案

clflush clflushopt

使高速缓存一致性域中的高速缓存层次结构的每个级别无效,该高速缓存行包含 用内存操作数指定的线性地址.如果该高速缓存行包含任何级别的已修改数据, 缓存层次结构,将数据写回到内存中.

Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory.

它们并非在每个CPU上都可用(尤其是clflushopt仅在第六代及更高版本中可用).可以肯定的是,您应该使用CPUID来验证其可用性:

They are not available on every CPU (in particular, clflushopt is only available on the 6th generation and later). To be certain, you should use CPUID to verify their availability:

CLFLUSH的可用性由CPUID功能标志CLFSH的存在指示 (CPUID.01H:EDX [bit 19]).

The availability of CLFLUSH is indicated by the presence of the CPUID feature flag CLFSH (CPUID.01H:EDX[bit 19]).

CPUID功能标志CLFLUSHOPT的存在指示CLFLUSHOPT的可用性 (CPUID.(EAX = 7,ECX = 0):EBX [bit 23]).

The availability of CLFLUSHOPT is indicated by the presence of the CPUID feature flag CLFLUSHOPT (CPUID.(EAX=7,ECX=0):EBX[bit 23]).

如果可用,则应使用clflushopt.当刷新大于4KiB(64行)的缓冲区时,它的性能优于clflush.

If available, you should use clflushopt. It outperforms clflush when flushing buffers larger than 4KiB (64 lines).

这是来自

出于参考目的(假设您在特权上下文中运行),还可以使用 (作为从轨道发射"的选项).这个:

For informational purpose (assuming you are running in a privileged context), you can also use invd (as a nuke-from-orbit option). This:

使处理器的内部缓存无效(刷新),并发出特殊功能的总线周期,该总线周期将外部总线定向到外部. 缓存也刷新自己.内部缓存中保存的数据不会写回到主存储器中.

Invalidates (flushes) the processor’s internal caches and issues a special-function bus cycle that directs external caches to also flush themselves. Data held in internal caches is not written back to main memory.

wbinvd ,其中:

将处理器内部缓存中的所有修改后的缓存行写回到主内存,并使(无效) 内部缓存.然后,该指令发出一个特殊功能的总线周期,该总线周期指示外部高速缓存也要写入 返回修改后的数据和另一个总线周期,以指示应该使外部缓存无效.

Writes back all modified cache lines in the processor’s internal cache to main memory and invalidates (flushes) the internal caches. The instruction then issues a special-function bus cycle that directs external caches to also write back modified data and another bus cycle to indicate that the external caches should be invalidated.

将来可能会加入ISA的指令是club.尽管这不能满足您的需要(因为它不一定会使该行无效),但出于完整性考虑,值得一提.这将:

A future instruction that could make it into the ISA is club. Although this won't fit your need (because it doesn't necessarily invalidate the line), it's worth mentioning for completeness. This would:

将包含用内存指定的线性地址的高速缓存行(如果脏)写回内存 缓存一致性域中任何级别的缓存层次结构的操作数.该行可能会保留在 未修改状态下的高速缓存层次结构.将行保留在缓存层次结构中是一项性能优化 (作为硬件的提示),以减少后续访问中缓存未命中的可能性.硬件可能 选择将行保留在缓存层次结构中的任何级别,并且在某些情况下,可能会使该行无效 从缓存层次结构中.

Writes back to memory the cache line (if dirty) that contains the linear address specified with the memory operand from any level of the cache hierarchy in the cache coherence domain. The line may be retained in the cache hierarchy in non-modified state. Retaining the line in the cache hierarchy is a performance optimization (treated as a hint by hardware) to reduce the possibility of cache miss on a subsequent access. Hardware may choose to retain the line at any of the levels in the cache hierarchy, and in some cases, may invalidate the line from the cache hierarchy.

这篇关于与高速缓存预取提示相反的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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