RISC-V指令集中的FENCE指令是什么意思？ [英] What is meant by the FENCE instruction in the RISC-V instruction set?

问题描述

在通过RISC-V ISA时，我在内存模型部分看到了一条指令（FENCE指令）。究竟是什么意思？

While going through the RISC-V ISA, I have seen an instruction in the memory model section (FENCE instruction). What does it mean exactly?

推荐答案

我发现仅在使用FENCE指令时才有一种情况。
示例：

I've found one case when using FENCE instruction is just necessary. Example:

1. SoC中的某些模块通过通过HostIO总线将值写入CSR 0x783（MIPI）来生成中断。


2. 固件跳转到中断处理程序。


3. 处理程序尝试通过将1写入寄存器来重置用户实现设备中的 pending位。


4. 该操作被编译为立即值= 1的存储指令。


5. 结果是，如果我在处理程序开始时未实现FENCE，我有一些垃圾值，而不是指令的适当立即参数。

1. Some module in a SoC generates interrupt by writting value into CSR 0x783 (MIPI) via HostIO bus.
2. Firmware jumps to the interrupt handler.
3. Handler tries to reset 'pending' bit in a user implemented device by writting 1 into register.
4. Such operation was compiled as a 'store' instruction with immediate value =1.
5. As result, if I don't implement FENCE at the beginning of the handler I have some garbage value instead of proper immediate argument of the instruction.

这篇关于RISC-V指令集中的FENCE指令是什么意思？的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！