如何在LLVM IR中使用RISC-V向量(RVV)指令? [英] How do I use the RISC-V Vector (RVV) instructions in LLVM IR?

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问题描述

本演示文稿Kruppe和Espasa在 https://github.com/llvm的LLVM主机中获得./llvm-project .

但是,当我拉出当前的母版并进行构建并尝试使用 llc 编译示例代码时(使用-mtriple = riscv32-unkown-none-rv32imv <指定目标/code>),出现以下错误:

 错误:../llvm-project/build/bin/llc:test.ll:4:18:错误:使用未定义的值'@ llvm.riscv.vsetvl' 

V扩展名似乎可用,因为 llc -march = riscv32 -mattr = help 列出了它:

 此目标的可用功能:...实验-v-"V"(矢量指令). 

我是否必须显式启用标记为实验性的目标功能?幻灯片中显示的这些向量内在函数是否甚至存在于上游版本中?如果是,我该如何使用它们?如果没有,我该如何在LLVM IR中使用矢量指令?


跟进:在这篇文章中Eli Friedman解释说,应该在 include/llvm/IR/IntrinsicsRISCV.td 中以及在解决方案

我在 LLVM开发人员的邮件列表:目前(2020年11月),LLVM中的RISC-V V扩展仅支持MC层(即组件级)(因此现在没有内在函数)./p>

但是,有一个 RFC 补丁,它为向量加载,存储和整数添加内在函数以及所需的基础结构添加了初始支持.生成 vsetvl [i] 指令.

In this presentation Kruppe and Espasa give an overview of the RISC-V Vector extension (RVV) and on slide 16 they show LLVM IR samples which use the vector instructions through intrinsic functions, such as:

%vl = call i32 @llvm.riscv.vsetvl(i32 8)

At the time of the talk (April 2019) LLVM support for the V extension was developed out-of-tree at https://github.com/hanna-kruppe/rvv-llvm. However, that repository is archived now and the README file indicates that it is outdated since support for the RISC-V V extension is now developed upstream. I assume that this means that the features are now available from LLVM master at https://github.com/llvm/llvm-project.

However, when I pull the current master and build it and try to compile the sample code with llc (specifying the target with --mtriple=riscv32-unkown-none-rv32imv), I get following error:

error: ../llvm-project/build/bin/llc: test.ll:4:18: error: use of undefined value '@llvm.riscv.vsetvl'

It seems that the V extension is available, since llc -march=riscv32 -mattr=help lists it:

Available features for this target:
...
  experimental-v           - 'V' (Vector Instructions).

Do I have to explicitly enable target features that are marked as experimental? Are these vector intrinsics shown in the slides even present in the upstream version? If yes, how do I use them? If no, how do I then use vector instructions in LLVM IR?


Follow-up: in this post Eli Friedman explains that target-specific intrinsics should be defined in include/llvm/IR/IntrinsicsRISCV.td, and indeed in the archived out-of-tree repository that file contains some vector-specific intrinsics which are not present in the upstream version. If these intrinsics have not been ported upstream, what is then the correct way to use the RISC-V vector instructions?

解决方案

I asked on the LLVM developper's mailing list: currently (Nov 2020) there is only MC layer (i.e. assembly level) support for the RISC-V V extension in LLVM (so no intrinsics right now).

However, there is an RFC and patch that adds initial support for vector load, store and integer add intrinsics, as well as the required infrastructure to generate vsetvl[i] instructions.

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