VHDL:“变量"的类型.与< =类型不兼容 [英] VHDL: Type of "variable" is incompatible with type of <=
问题描述
能不能解释一下为什么我在这段代码中出现语法错误.
Could some explain why i get syntax error with this piece of code..
An <= "1110" when anode = "00" else
AN <= "1101" when anode = "01" else
An <= "1011" when anode = "10" else
An <= "0111" when anode = "11";
segment <= counter_1r when anode = "00" else
segment <= counter_10r when anode = "01" else
segment <= counter_100r when anode = "10" else
segment <= counter_1000r When anode = "11";
说
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 181. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 182. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 183. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 181. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 182. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 183. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 186. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 187. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 188. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 186. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 187. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 188. Type of segment is incompatible with type of <=.
我不理解,因为在我的代码中我已经设置了要输出的实体中所有受影响的元素,所以它们都使用相同的类型.
Which i Don't understand, because In my code i've set all the affected element in my entity to be output, they are all using the same type.
PORT(
CLK: in std_logic;
-- LED: out std_logic_vector (7 downto 0);
-- Switch: in std_logic_vector(7 downto 0);
Segment: out std_logic_vector (7 downto 0);
AN: out std_logic_vector (3 downto 0)
);
end Main;
architecture Behavioral of Main is
signal counter_1000: integer range 0 to 9;
signal counter_100: integer range 0 to 9;
signal counter_10: integer range 0 to 9;
signal counter_1: integer range 0 to 9;
signal counter_1r: std_logic_vector(7 downto 0);
signal counter_10r: std_logic_vector(7 downto 0);
signal counter_100r: std_logic_vector(7 downto 0);
signal counter_1000r: std_logic_vector(7 downto 0);
signal prescaler: integer range 0 to 50000000;
signal limit: integer range 0 to 50000000;
signal Anode: std_logic_vector(1 downto 0);
begin
推荐答案
要查看为什么会收到错误消息,请像下面这样查看代码:
To see why you get the error message, look at your code like this:
An <= "1110" when anode = "00" else (AN <= "1101")....
else
子句将被编译为AN
与1101
的比较,以查看它是否小于或等于.类型为boolean
的向量,与类型为An
的向量不兼容. (我希望VHDL没有选择<=
作为赋值运算符,但是我们有!)
The else
clause will be compiled as a comparison of AN
with 1101
to see if it's less-than-or-equal-to. Which is of type boolean
, which is incompatible with the type of An
, a vector. (I wish VHDL hadn't picked <=
as an assignment operator, but there we are!)
您需要的语法更像这样(请注意在其他行上缺少<=
)
The syntax you need is more like this (note the lack of <=
on the other lines)
An <= "1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
null;
这篇关于VHDL:“变量"的类型.与< =类型不兼容的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!