NI Labview FPGA:错误:可移植性:3-Xilinx应用程序内存不足 [英] NI Labview FPGA: ERROR:Portability:3 - Xilinx Application has run out of memory
问题描述
我正在使用NI Labview FPGA将设计编译并综合到FPGA上，并遇到以下错误:
I am using NI Labview FPGA to compile and synthesise a design onto the FPGA and have encountered the following error:
LabVIEW FPGA: The compilation failed due to a Xilinx error.
Details:
ERROR:Portability:3 - This Xilinx application has run out of memory or has encountered a memory conflict. Current memory usage is 4025524 kb. You can try increasing your system's physical or virtual memory. If you are using a Win32 system, you can increase your application memory from 2GB to 3GB using the /3G switch in your boot.ini file. For more information on this, please refer to Xilinx Answer Record #14932. For technical support on this issue, please visit http://www.xilinx.com/support.
Process "Synthesize - XST" failed
INFO:TclTasksC:1850 - process run : Synthesize - XST is done.
Compilation Time
---------------------------
Date submitted: 17/01/2017 15:41
Date results were retrieved: 17/01/2017 17:01
Time waiting in queue: 00:11
Time compiling: 01:19:20
- Generate Xilinx IP: 00:00
- Estimate Resources - PlanAhead: 03:04
- Synthesize - XST: 01:14:54
这是否意味着云编译服务器内存不足?还是我的本地计算机内存不足?
Does this mean the cloud compile server is running out of memory? Or is my local computer running out of memory?
我认为它是本地计算机.如何解决这个问题，以便可以编译我的设计?
I assume it is the local computer. How might I get around this such that I can compile my design?
推荐答案
与NI工程师交谈后，看来我的设计对FPGA来说太大了，而云编译服务器仅被设计为支持设计的编译，实际上要在其FPGA上安装，将4GB的Ram似乎是将设计编译到任何NI支持的FPGA上所需要的.
After talking with an NI engineer it appears that my design was just too large for the FPGA and the cloud compile server is only designed to support compilation of designs which could actually fit on their FPGAs, 4GB of Ram appears to be all you should need to compile a design onto any NI provdided FPGA.
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