什么是存储缓冲区？ [英] what is a store buffer?

问题描述

任何人都可以解释什么是负载缓冲区，它是如何从无效队列不同​​。而且存储缓冲和差异写结合缓冲？
由保罗·êMckenny纸<一个href=\"http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.07.23a.pdf\">http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.07.23a.pdf非常漂亮解释了有关存储缓冲区和无效队列，但遗憾的是没有谈及写结合缓冲

can anyone explain what is load buffer and how it's different from invalidation queues. and also difference between store buffers and write combining buffers? The paper by Paul E Mckenny http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.07.23a.pdf explains very nicely about the store buffers and invalidation queues but unfortunately doesn't talk about write combining buffers

推荐答案

这是无效的队列更像是一个存储缓冲区，但它的存储系统，而不是CPU的一部分。基本上它是保持失效的轨道，并确保它们正确地完成，使得高速缓存可以采取高速缓存线的所有权，因此它可以然后写该行的队列。负载队列是一个投机性的结构，它跟踪的飞行载荷的在乱序处理器。例如，可能会出现以下

An invalidate queue is more like a store buffer, but it's part of the memory system, not the CPU. Basically it is a queue that keeps track of invalidations and ensures that they complete properly so that a cache can take ownership of a cache line so it can then write that line. A load queue is a speculative structure that keeps track of in-flight loads in the out of order processor. For example, the following can occur

1. CPU推测发出从X中的负载


2. 这是加载到程序中的之后的一家商店Y，但Y的地址还没有解决，所以店里没有继续。


3. Y被解决，它原来是等于X.在这家店为Y得到解决的时候，那家商店搜索已发出，投机负荷加载队列，但店里后，present Ÿ在程序的顺序。它会注意到负载为X（它等于Y）和具有压扁这些指令开始与负荷X和以下

1. CPU speculatively issue a load from X
2. That load was in program order after a store to Y, but the address of Y is not resolved yet, so the store does not proceed.
3. Y is resolved and it turns out to be equal to X. At the time that the store to Y is resolved, that store searches the load queue for speculative loads that have issued, but are present after the store to Y in program order. It will notice the load to X (which is equal to Y) and have to squash those instructions starting with load X and following.

一个存储缓冲器是存在的CPU中，就像负载队列是允许CPU猜测存储投机性结构。写结合缓冲是内存系统的组成部分，基本上采取了一堆小写的（想想8字节写入），并将它们发送到存储系统之前，他们包成一个更大的交易（64字节的高速缓存线）。这些写入并不是投机，并且是一致性协议的一​​部分。目标是保存总线带宽。通常情况下，一个写入合并缓冲器被用于非缓存写入I / O设备（通常为图形卡）。它在I / O设备的典型做8字节写和写缓存相结合允许那些写入运送他们的时候了过去的高速缓存合并成较大的事务做一堆的设备寄存器编程的。

A store buffer is a speculative structure that exists in the CPU, just like the load queue and is for allowing the CPU to speculate on stores. A write combining buffer is part of the memory system and essentially takes a bunch of small writes (think 8 byte writes) and packs them into a single larger transaction (a 64-byte cache line) before sending them to the memory system. These writes are not speculative and are part of the coherence protocol. The goal is to save bus bandwidth. Typically, a write combining buffer is used for uncached writes to I/O devices (often for graphics cards). It's typical in I/O devices to do a bunch of programming of device registers by doing 8 byte writes and the write combining buffer allows those writes to be combined into larger transactions when shipping them out past the cache.

这篇关于什么是存储缓冲区？的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！