的ARM Cortex：使用位带互斥 [英] ARM cortex: mutex using bit banding

问题描述

鉴于此，上的ARM Cortex M3，我可以：

Given that, on the ARM Cortex M3, I can:

• 原子读取单个位


• 原子设置单个位


• 原子明确单个位

我如何结合这一个互斥样式设置操作：

How can I combine these for a mutex style set of operations:

try lock
take lock
release lock

似乎 try_lock 或 take_lock 将需要两个操作，不会是原子的。

It seems that try_lock or take_lock would require two operations that would not be atomic.

我需要更多的控制做到这一点？关闭全局中断会做，但它似乎应该有更多的手术方法。

Do I need more control to accomplish this? Disable global interrupts would do it but it seems there should be a more surgical approach.

推荐答案

您 rwl_TryLock（）不一定返回一个失败，如果锁已经举行，届时，它被称为（你的编译器，至少应该给予有关无返回值code路径警告）。请尝试以下操作：

Your rwl_TryLock() doesn't necessarily return a failure if the lock is already held when it's called (your compiler should be giving at least a warning about a code path that has no return value). Try the following:

int rwl_TryLock(volatile uint32_t *lock, int who){

    Var_SetBit_BB((uint32_t)lock, who);
    if(*lock == (1<<who)){ // check that we have exclusive access
        // got the lock!
        return 1;
    } 

    // do not have the lock
    Var_ResetBit_BB((uint32_t)lock, who); // clear the lock flag
    return 0;
}

请注意，上面不会为递归声称同一个锁（即，工作，如果谁==由指定的任务1 已经锁定，并试图声称再次，在code以上将无法正常工作），但是这是你原来也是如此。

Note that the above will not work for recursively claiming the same lock (ie., if the task specified by who == 1 already has the lock and tries to claim it again, the code above will not work correctly), but that was true of your original as well.

此外，中断可以禁用/对的Cortex M3 pretty启用快（这是一个简单的更新到NVIC寄存器）。你确定你的系统无法中断延迟额外几个周期住，以保持code用于处理简单的锁定数据结构（这通常意味着更容易做出正确的）？

Also, interrupts can be disabled/enabled on the Cortex M3 pretty quickly (it's a simple update to an NVIC register). Are you sure your system can't live with an additional few cycles of interrupt latency to keep the code for handling the lock data structures simple (which generally means easier to make correct)?

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