使性能监视寄存器用户接入方式？ [英] enabling performance monitoring register to user access mode?

问题描述

我已经写了code，使性能监视寄存器作为用户通过置位为1。我在MCR指令越来越ARM_BAD_INSTRUCTION和MRC的喽访问。

I have written code to enable performance monitoring register as user accessible by setting bit as 1. I getting ARM_BAD_INSTRUCTION at MCR instruction and MRC is going fine.

我使用的ARMv7（皮质A5）

I am using armv7(cortex a5)

.cfi_startproc

.cfi_startproc

MRC     p15, 0, r0, c9, c14, 0  @ Read PMUSERENR Register
ORR     r0, r0, #0x01           @ Set EN bit (bit 0)
MCR     p15, 0, r0, c9, c14, 0  @ Write PMUSERENR Register
ISB                             @ Synchronize context

BX LR
.cfi_endproc

BX lr .cfi_endproc

推荐答案

的按文件，PMUSERENR是特权模式下只可写的，因此从用户空间特权的写它的确会引发未定义指令异常的一种尝试。

As per the documentation, PMUSERENR is only writeable from privileged modes, thus an attempt to write to it from unprivileged userspace will indeed raise an undefined instruction exception.

如果要启用用户空间的访问，你需要从内核做（或可能从一个内核的情况下，虚拟机管理程序/固件不知道的PMU本身）。

If you want to enable userspace access, you need to do it from the kernel (or possibly from a hypervisor/firmware in the case of a kernel which doesn't know about PMUs itself).

如果你没有任何特权等软件的控制，那么，你就别想自己的直接访问，因为这是相当特权的概念点。你可能有什么，但是，是由操作系统提供的一些用户空间的API - 如 PERF事件在Linux上 - 让您的个人资料和衡量的东西，而直接管理硬件的麻烦;坦率地说这通常是更好的选择，即使你的可能的启用直接访问，因为用户空间还没有办法正确地处理多任务系统上的所有必要的事件过滤，调度，溢出中断等。

If you don't have control of any such privileged software, well then you're not getting yourself direct access, because that's rather the point of the notion of privilege. What you might have, however, is some userspace API provided by the OS - such as perf events on Linux - to let you profile and measure stuff without the hassle of managing the hardware directly; frankly that's usually the better option even if you could enable direct access, because userspace still has no way to properly handle all the necessary event filtering, scheduling, overflow interrupts, etc. on a multitasking system.

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