如果数据已经在缓存中，非临时存储会发生什么? [英] What happens with a non-temporal store if the data is already in cache?

问题描述

当您使用非临时存储时，例如movntq，并且数据已经在缓存中，存储会更新缓存而不是写入内存吗?或者它会更新缓存行并将其写出，驱逐它?或者什么?

这是一个有趣的困境.假设线程 A 正在加载包含 x 和 y 的缓存行.线程 B 使用 NT 存储写入 x.线程 A 写入 y.如果 B 对 x 的存储可以在 A 的加载发生时传输到内存，那么这里就会发生数据竞争.如果 A 看到 x 的旧值，但 X 的写入已经发生，那么稍后的 y 写入和缓存线的最终写回将破坏无关值 x.我假设处理器以某种方式阻止了这种情况的发生?如果允许行为，我看不出任何人可以使用 NT 商店构建可靠的系统.

解决方案

您描述的所有行为都是非临时存储的合理实现.实际上，在现代 x86 CPU 上，实际语义是对 L1 缓存没有影响，但 L2(和更高级别的缓存，如果有)不会驱逐缓存线来存储非临时获取结果.

没有数据竞争，因为缓存是硬件一致的.驱逐缓存行的决定不会以任何方式影响这种一致性.

When you use non-temporal stores, e.g. movntq, and the data is already in cache, will the store update the cache instead of writing out to memory? Or will it update the cache line and write it out, evicting it? Or what?

Here's a fun dilemma. Suppose thread A is loading the cache line containing x and y. Thread B writes to x using a NT store. Thread A writes to y. There's a data race here if B's store to x can be in-transit to memory while A's load is happening. If A sees the old value of x, but the write of X already happened, then the later write of y and eventual write back of the cache line will clobber unrelated value x. I assume the processor somehow prevents that from happening? I can't see how anyone could build a reliable system using NT stores if it were allowable behavior.

解决方案

All of the behaviors you describe are sensible implementations of a non-temporal store. In practice, on modern x86 CPUs, the actual semantics are that there's no effect on the L1 cache but the L2 (and higher-level caches, if any) will not evict a cache line to store the non-temporal fetch results.

There is no data race because the caches are hardware coherent. This coherence is not effected in any way by the decision to evict a cache line.

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