ARM 的 Linux 内核中的页表条目 (PTE) 描述符 [英] Page table entry (PTE) descriptor in Linux kernel for ARM

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问题描述

我已经阅读了 Duartes 的文章:http://duartes.org/gustavo/blog/post/how-the-kernel-manages-your-memory

I have read article of Duartes from: http://duartes.org/gustavo/blog/post/how-the-kernel-manages-your-memory

关于PTE内容的部分描述,位[0:11]与ARMv5架构参考手册中的描述不同

In part that describes about PTE content, bit [0:11] is different with description in ARMv5 Architecture Reference Manual

详情是:

PTE 的 [0:11] 位包含:

Bit [0:11] of the PTE contain:

  • 在 Duartes 文章中:bit 0:P(存在),bit 1:R/W,bit 2:U/S(用户/主管),...
  • 在 ARMv5 架构参考手册中:Bits[1:0] 识别描述符的类型(0b11 标记精细页表描述符),Bits[4:2]:这些位的含义是实现定义,...
  • In Duartes article: bit 0: P (present), bit 1: R/W , bit 2: U/S (user/supervisor),...
  • In ARMv5 Architecture Reference Manual : Bits[1:0] Identify the type of descriptor (0b11 marks a fine page table descriptor), Bits[4:2]: The meaning of these bits is IMPLEMENTATION DEFINED,...

(参考:http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0198e/I16780.html).我认为ARMv5架构参考手册中的Second-level descriptor与Duartes的文章中的PTE相对应.

(Refer at: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0198e/I16780.html ) . I think the Second-level descriptor in ARMv5 Architecture Reference Manual is corresponding with PTE in Duartes's article.

那么,问题是 PTE 描述符取决于平台(x86、ARM,...)?.

So, question is the PTE descriptor is depending on platform (x86, ARM,...) ?.

对我来说,我认为 PTE 描述符不应该依赖于平台.

For me, I think PTE descriptor should not depend on platform.

谢谢

推荐答案

由于每个架构实现其 MMU(内存管理单元)的方式不同,PTE 描述符依赖于架构.

As each architecture implement their MMU (memory management unit) differently, the PTE descriptor is architecture dependent.

如果我们看看 Linux,它有一个三级页表结构(从 x86 架构继承而来),在大多数 ARM 平台中被包装以适应二级页表结构(较新的 ARM 支持 3 级).Linux 还使用 x86 架构中可用的脏"和已访问"位作为内核的内存管理逻辑.这些位在 ARM 架构中是不可用的,ARM Linux 已经通过在软件中模拟它来解决这个问题.这是通过拥有两个版本的 PTE 页表来完成的.一种用于包含这些缺失位"的操作系统,另一种用于实际使用的硬件.

If we look at Linux, it has a three level page table structure (inherited from the x86 architecture), which in most ARM platforms is wrapped to fit a two level page table structure (newer ARM have support for 3 levels). Linux also uses "dirty" and "accessed" bit that is available in the x86 architecture for the memory management logic of the kernel. These bits are not available in the ARM architecture, which ARM Linux has solved by emulating it in software. This is done by having two versions of the PTE page tables. One for the OS which contains these missing "bits", and one for the actual HW to use.

最后,不同架构的 Linux 操作系统的行为是一样的.这完全是关于操作系统如何使用特定架构提供的硬件机制,因为每种机制都有优点和缺点.

In the end, the Linux OS for different architectures behave the same. It's all about how the OS are using the hardware mechanisms that the specific architecture is offering as there are pro and cons for each.

这篇关于ARM 的 Linux 内核中的页表条目 (PTE) 描述符的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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