第 2 阶段 MemAttr 长描述符 ARM PTE 查询 [英] Stage 2 MemAttr Long Descriptor ARM PTE query

问题描述

对于 Stage 2 Translation，在较低的属性中有一个字段叫做 MemAttr[3:0]穷举其所有可能的值给出下表

For Stage 2 Translation, there is a field in lower attributes called MemAttr[3:0] Exhaustively enumerating its all possible values gives the following table

    /* All Possible Values of MemAttr for Stage 2 */
/*
 *  0000    Region is Strongly Ordered
 *  0001    Device Memory   [ONC by Default]
 *  0010    XXXXX
 *  0011    XXXXX
 *  0100    XXXXX
 *  0101    Normal Memory O   NC, I NC
 *  0110    Normal Memory O   NC, I WT C
 *  0111    Normal Memory O   NC, I WB C
 *  0100    XXXXX
 *  1001    Normal Memory O WT C, I NC
 *  1010    Normal Memory O WT C, I WT C
 *  1011    Normal Memory O WT C, I WB C
 *  1100    XXXXX
 *  1101    Normal Memory O WB C, I NC
 *  1110    Normal Memory O WB C, I WT C
 *  1111    Normal Memory O WB C, I WB C
 */

O - 外我 - 内WB-写回WT- 直写NC - 不可缓存C - 可缓存.

O - Outer I - Inner WB- WriteBack WT- WriteThrough NC - Non Cacheable C - Cacheable.

现在我想知道分配给guest的正常内存，我应该在mem attr中放入什么值.我只是在寻找 WriteBack Cacheable.

Now I am wondering for normal memory assigned to guest, what should be the values I should put in mem attr. I am only looking for WriteBack Cacheable.

推荐答案

对于任何通用 RAM 映射，您都需要正常的回写缓存.除非您正在做一些非常特别的事情，否则您希望内部和外部缓存都使用它.

Normal, write-back cacheable is what you want for any general-purpose RAM mappings. Unless you're doing something very special, you want that for both inner and outer caches.

这篇关于第 2 阶段 MemAttr 长描述符 ARM PTE 查询的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！