Linux内核为ARM页表项(PTE)描述 [英] Page table entry (PTE) descriptor in Linux kernel for ARM

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问题描述

我已经读Duartes的文章: HTTP: //duartes.org/gustavo/blog/post/how-the-kernel-manages-your-memory

I have read article of Duartes from: http://duartes.org/gustavo/blog/post/how-the-kernel-manages-your-memory

在描述有关PTE内容的一部分,位[0:11]是用的ARMv5架构参考手册

In part that describes about PTE content, bit [0:11] is different with description in ARMv5 Architecture Reference Manual

详细信息是:

位[0:11]的PTE都包含:

Bit [0:11] of the PTE contain:


  • 在Duartes文章:位0 :P(present),位1 :R / W,位2 :U / S(用户/主管),...

  • 在的ARMv5架构参考手册:位[1:0] 明确描述符(0b11标志着细页表描述符)的类型,位[4:2] :这些位的含义是实现定义,...

  • In Duartes article: bit 0: P (present), bit 1: R/W , bit 2: U/S (user/supervisor),...
  • In ARMv5 Architecture Reference Manual : Bits[1:0] Identify the type of descriptor (0b11 marks a fine page table descriptor), Bits[4:2]: The meaning of these bits is IMPLEMENTATION DEFINED,...

(参见于: HTTP :?//infocenter.arm.com/help/index.jsp话题= / com.arm.doc.ddi0198e / I16780.html )。我想的ARMv5架构参考手册中的二级描述符对应着PTE在Duartes的文章。

(Refer at: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0198e/I16780.html ) . I think the Second-level descriptor in ARMv5 Architecture Reference Manual is corresponding with PTE in Duartes's article.

所以,问题是,PTE描述取决于平台(X86,ARM,...)?

So, question is the PTE descriptor is depending on platform (x86, ARM,...) ?.

对于我来说,我觉得PTE描述不应该依赖于平台。

For me, I think PTE descriptor should not depend on platform.

感谢

推荐答案

由于每个架构实施他们的MMU(内存管理单元)不同,因此PTE描述符的体系结构相关。

As each architecture implement their MMU (memory management unit) differently, the PTE descriptor is architecture dependent.

如果我们看一下Linux的,它有一个三级页表结构(从x86架构继承),在大多数ARM平台,被包装以适应二级页表结构(较新的ARM有3个级别的支持)。 Linux还使用脏和访问位是在x86架构为内核的存储器管理逻辑可用。这些位是不是在ARM架构,这ARM Linux已经在软件模拟它解决可用。这是通过具有PTE页表的两个版本进行。一个用于含有这些缺少的位的OS和一个用于实际硬件来使用。

If we look at Linux, it has a three level page table structure (inherited from the x86 architecture), which in most ARM platforms is wrapped to fit a two level page table structure (newer ARM have support for 3 levels). Linux also uses "dirty" and "accessed" bit that is available in the x86 architecture for the memory management logic of the kernel. These bits are not available in the ARM architecture, which ARM Linux has solved by emulating it in software. This is done by having two versions of the PTE page tables. One for the OS which contains these missing "bits", and one for the actual HW to use.

在结束时,在Linux OS不同体系结构的行为相同。这是所有关于操作系统如何使用,由于有亲和缺点每个特定的架构提供硬件机制。

In the end, the Linux OS for different architectures behave the same. It's all about how the OS are using the hardware mechanisms that the specific architecture is offering as there are pro and cons for each.

这篇关于Linux内核为ARM页表项(PTE)描述的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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