为什么ARM上有两个向量表地址? [英] Why two vector table addresses on ARM?

问题描述

在ARM架构中，有一个低向量地址0x0和高向量地址0xFFFF0000.我想知道为什么可能需要两个向量地址?在 Intel 微处理器和微控制器中，有一个向量地址.

In ARM architecture there is one low vector address0x0 and high vector address 0xFFFF0000. I was wondering why two vector addresses might be needed ? In Intel microprocessors and microcontrollers there is one vector address.

有 2 个向量地址有什么特别的原因吗?

Is there any particular reason to have 2 vector addresses ?

推荐答案

一些微控制器系列有不止一个到多个不同的起始地址和/或它们使用相同的地址和基于带引脚的切入和切出地址解码这样您就可以从供应商创建的一个引导加载程序、用户引导加载程序或用户应用程序启动.(允许您恢复通常会变成砖块的系统).

Some microcontroller families have more than one to a number of different start addresses and/or they use the same address and switch in and out address decoding based on strap pins so that you can boot from one bootloader created say by the vendor, or the users bootloader or the users application. (allowing you to recover what would normally be a bricked system).

你可以想象同样的事情.想想这些微控制器是如何工作的，必须在内核之外完成工作以更改用于启动的闪存组.通过在内核上使用此带状引脚，您可以在不同的地址拥有一个备用引导加载程序，该引导加载程序可用于重写/管理/开发/拯救主要应用程序.

You could envision the same thing. Think of how these microcontrollers work by having to do the work outside the core to change the flash bank being used to boot from. By using this strap pin on the core, you could have an alternate bootloader at a different address, this bootloader could be used to re-write/manage/develop/rescue the primary application.

您也可以避免使用 rom/ram 向量地址.比如说，你从高向量上的闪存启动并且内存为 0，然后你可以将程序加载到内存或至少一个运行时特定的向量表中，然后切换位(可能必须从蹦床上反弹才能到达那里，我不记得我们没有在我们的芯片中使用高向量).

You can also possibly avoid the rom/ram vector address thing. say for example you boot from flash on the high vector and have ram at 0, you could then load the program into ram or at least a runtime specific vector table, then switch the bit (might have to bounce off of a trampoline to get there, I dont remember we didnt use the high vector in our chip).

并不是说这就是 ARM 这样做的原因，但如果不出意外，它为供应商提供了一个简单的救援计划.一些供应商的救援方案或备用引导方法过于复杂.我实际上希望看到 arm 和其他人有几个，至少两个信号给出四个地址，可能是 0x00000000, 0x40000000, 0x80000000, 0xC0000000，那种东西或 0x00000000, 0x800000000xFF.0在多个内核上做类似的事情，尤其是 cortex-m，你可能会看到芯片供应商开始使用它而不是他们自己的方案，并且在供应商之间从一个芯片转移到另一个芯片时会不那么痛苦，或者在同一供应商产品线内.

Not saying that is why ARM did it, but if nothing else it makes for a simple rescue scheme for vendors. some of the vendors rescue schemes or alternate boot methods are overcomplicated. I would actually like to see arm and others have several, at least two signals giving four addresses maybe 0x00000000, 0x40000000, 0x80000000, 0xC0000000, that kind of thing or 0x00000000, 0x80000000, 0xFFFF0000, 0xFFFF8000. Do something like that on a number of cores, esp the cortex-m, and you might see the chip vendors start to use that instead of their own schemes and it would be less of a pain when moving from one chip to another between vendors or within the same vendors product line.

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