如何在 Makefile 目标中使用 Bash 语法? [英] How can I use Bash syntax in Makefile targets?

问题描述

我经常发现 Bash 语法非常有用，例如过程替换如 diff <(sort file1) <(sort file2).

I often find Bash syntax very helpful, e.g. process substitution like in diff <(sort file1) <(sort file2).

是否可以在 Makefile 中使用此类 Bash 命令?我在想这样的事情:

Is it possible to use such Bash commands in a Makefile? I'm thinking of something like this:

file-differences:
    diff <(sort file1) <(sort file2) > $@

在我的 GNU Make 3.80 中，这会报错，因为它使用 shell 而不是 bash 来执行命令.

In my GNU Make 3.80 this will give an error since it uses the shell instead of bash to execute the commands.

推荐答案

来自 GNU Make 文档，

From the GNU Make documentation,

5.3.1 Choosing the Shell
------------------------

The program used as the shell is taken from the variable `SHELL'.  If
this variable is not set in your makefile, the program `/bin/sh' is
used as the shell.

所以把 SHELL :=/bin/bash 放在你的 makefile 的顶部，你应该很高兴.

So put SHELL := /bin/bash at the top of your makefile, and you should be good to go.

顺便说一句:您也可以为一个目标执行此操作，至少对于 GNU Make.每个目标都可以有自己的变量赋值，如下所示:

BTW: You can also do this for one target, at least for GNU Make. Each target can have its own variable assignments, like this:

all: a b

a:
    @echo "a is $$0"

b: SHELL:=/bin/bash   # HERE: this is setting the shell for b only
b:
    @echo "b is $$0"

这将打印:

a is /bin/sh
b is /bin/bash

有关更多详细信息，请参阅文档中的特定于目标的变量值".该行可以位于 Makefile 中的任何位置，不必紧接在目标之前.

See "Target-specific Variable Values" in the documentation for more details. That line can go anywhere in the Makefile, it doesn't have to be immediately before the target.

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