如何使用Bash的语法。在Makefile目标？ [英] How can I use Bash syntax in Makefile targets?

问题描述

我经常发现猛砸语法非常有用，例如，在 DIFF＆LT进程替换等;（排序文件1）≤（排序文件2）

I often find Bash syntax very helpful, e.g. process substitution like in diff <(sort file1) <(sort file2).

是否有可能使用这种猛砸在一个Makefile命令？我在想是这样的：

Is it possible to use such Bash commands in a Makefile? I'm thinking of something like this:

file-differences:
    diff <(sort file1) <(sort file2) > $@

在我的GNU让3.80这会给出一个错误，因为它使用了壳而不是庆典执行命令。

In my GNU Make 3.80 this will give an error since it uses the shell instead of bash to execute the commands.

推荐答案

从GNU制作文档，

5.3.1 Choosing the Shell
------------------------

The program used as the shell is taken from the variable `SHELL'.  If
this variable is not set in your makefile, the program `/bin/sh' is
used as the shell.

所以把 SHELL：= /斌/庆典在你的makefile的顶部，你应该是好去。

So put SHELL := /bin/bash at the top of your makefile, and you should be good to go.

BTW：你也可以做到这一点的一个目标，至少在GNU制作。每个目标都可以有自己的变量赋值，如下所示：

BTW: You can also do this for one target, at least for GNU Make. Each target can have its own variable assignments, like this:

all: a b

a:
    @echo "a is $$0"

b: SHELL:=/bin/bash   # HERE: this is setting the shell for b only
b:
    @echo "b is $$0"

这会打印：

a is /bin/sh
b is /bin/bash

请参阅特定目标变量值更多详细信息的文件中。这条线可以在Makefile去任何地方，它没有到目标之前立即

See "Target-specific Variable Values" in the documentation for more details. That line can go anywhere in the Makefile, it doesn't have to be immediately before the target.

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