L1 和 L2 缓存的行大小 [英] Line size of L1 and L2 caches

问题描述

从之前在此论坛上的问题，我了解到在大多数内存系统中，L1 缓存是 L2 缓存的子集，这意味着从 L2 中删除的任何条目也会从 L1 中删除.

From a previous question on this forum, I learned that in most of the memory systems, L1 cache is a subset of the L2 cache means any entry removed from L2 is also removed from L1.

所以现在我的问题是如何为 L2 缓存中的条目确定 L1 缓存中的相应条目.L2 条目中存储的唯一信息是标签信息.根据这个标签信息，如果我重新创建 addr，如果 L1 和 L2 缓存的行大小不同，它可能会跨越 L1 缓存中的多行.

So now my question is how do I determine a corresponding entry in L1 cache for an entry in the L2 cache. The only information stored in the L2 entry is the tag information. Based on this tag information, if I re-create the addr it may span multiple lines in the L1 cache if the line-sizes of L1 and L2 cache are not same.

该架构是否真的会为刷新两条线而烦恼，或者它只是维护具有相同线大小的 L1 和 L2 缓存.

Does the architecture really bother about flushing both the lines or it just maintains L1 and L2 cache with the same line-size.

我知道这是一个政策决定，但我想知道常用的技术.

I understand that this is a policy decision but I want to know the commonly used technique.

推荐答案

在 Core i7 中，L1、L2 和 L3 中的行大小相同:即 64 字节.我想这简化了维护包容性和一致性的过程.

In core i7 the line sizes in L1 , L2 and L3 are the same: that is 64 Bytes. I guess this simplifies maintaining the inclusive property, and coherence.

参见第 10 页:https://www.aristeia.com/TalkNotes/ACCU2011_CPUCaches.pdf

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