在多核CPU的x86 LOCK问题 [英] x86 LOCK question on multi-core CPUs

问题描述

这是真的，在x86 ASMLOCK命令preFIX导致所有内核冻结而指令后LOCK正在执行？

Is it true that the x86 ASM "LOCK" command prefix causes all cores to freeze while the instruction following "LOCK" is being executed?

我在博客中读到这一点，它没有任何意义。我无法找到任何东西，表示如果这是真的还是假的。

I read this in a blog post and it doesn't make sense. I can't find anything that indicates if this is true or not.

推荐答案

这是关于锁定内存总线该地址。 英特尔64和IA-32架构软件开发人员手册 - 卷3A：系统编程指南，1 告诉我们：

It's about locking the memory bus for that address. The Intel 64 and IA-32 Architectures Software Developer's Manual - Volume 3A: System Programming Guide, Part 1 tells us:

这是内部处理器缓存7.1.4影响锁定操作的。

7.1.4 Effects of a LOCK Operation on Internal Processor Caches.

对于英特尔486和奔腾处理器，LOCK＃信号总是
  一个LOCK时断言总线上
  操作，即使所述的存储器区域
  被锁在被缓存
  处理器。

For the Intel486 and Pentium processors, the LOCK# signal is always asserted on the bus during a LOCK operation, even if the area of memory being locked is cached in the processor.

有关的P6和最近处理器
  家庭的如果内存面积为
  锁定期间锁定操作
  缓存在作为处理器
  进行加锁操作
  写回内存，完全
  包含在一个高速缓存行，则
  处理器可能无法断言LOCK＃
  在总线上的信号的。相反，它会
  内部修改所述存储器位置
  并允许[其]高速缓存一致性
  机制，以确保操作
  动作是自动进行的。这个
  操作被称为高速缓存锁定。
  高速缓存一致性机制
  自动prevents两个或更多个
  具有相同面积的处理器
  同时从内存中修改
  在这方面的数据。 （强调）

For the P6 and more recent processor families, if the area of memory being locked during a LOCK operation is cached in the processor that is performing the LOCK operation as write-back memory and is completely contained in a cache line, the processor may not assert the LOCK# signal on the bus. Instead, it will modify the memory location internally and allow [its] cache coherency mechanism to insure that the operation is carried out atomically. This operation is called "cache locking." The cache coherency mechanism automatically prevents two or more processors that have the same area of memory from simultaneously modifying data in that area. (emphasis added)

在这里我们了解到，P6和较新的芯片有足够的智慧，以确定他们是否真的有权阻止了车，也可以只依靠智能缓存。我觉得这是一个整洁的优化。

Here we learn that the P6 and newer chips are smart enough to determine if they really have to block off the bus or can just rely on intelligent caching. I think this is a neat optimization.

我在博客文章如何操作锁锁？

这篇关于在多核CPU的x86 LOCK问题的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！