什么是在SandyBridge的微架构栈引擎? [英] What is the stack engine in the Sandybridge microarchitecture?

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问题描述

我读 http://www.realworldtech.com/sandy-bridge/ 并且我面临着一些问题,在了解了一些问题:


  

专用堆栈指针跟踪器还美元的Sandy Bridge p $ psent
  并将其改名为堆栈指针,省去序列依赖性和
  移除一些微指令的。


什么是专用堆栈指针跟踪实际上?


  

有关的Sandy Bridge(和P4),英特尔仍然使用术语ROB。但它
  关键是要了解的是,在这种情况下,它仅仅是指在
  状态阵列飞行微指令


这是什么意思,其实?请说清楚。


解决方案

  1. 瓦格纳雾的microarch文档解释,栈引擎处理的 RSP + = 8 / rsp- = 8 推/流行/通话/在寄存器重命名阶段退役的一部分(开证微指令进入OOO核心之前)。所以OOO芯仅需要处理负载/存储部分,具有由堆栈引擎生成的地址。偶尔有插入UOP同步其从 RSP 当8位位移计数器溢出时,或当OOO核心需求的价值 RSP <偏移/ code>直接(如子RSP,8 MOV [RSP-8],EAX


<醇开始=2>
  • 的P6系列microarch(的PPro到的Nehalem)存储在ROB建筑寄存器的值。 SNB家族的微架构(和P4)拥有物理寄存器文件,因此ROB商店直接登录,而不是数据编号。重排序缓存依然为CPU的一部分优良的名称。

  • 需要注意的是SNB推出AVX,与256B载体。使每一个进入ROB足够大的存储双大小的载体是presumably不可取相比,只保留他们在一个较小的FP寄存器文件。

    SNB简化了微指令格式以节省电力。这确实导致UOP微融合能力的牺牲,虽然:去codeRS和UOP缓存仍可微型保险丝2寄存器内存操作数,的但是他们发行到核心OOO前未层压。

    I am reading http://www.realworldtech.com/sandy-bridge/ and I'm facing some problems in understanding some issues:

    The dedicated stack pointer tracker is also present in Sandy Bridge and renames the stack pointer, eliminating serial dependencies and removing a number of uops.

    What is a dedicated stack pointer tracker actually?

    For Sandy Bridge (and the P4), Intel still uses the term ROB. But it is critical to understand that, in this context, it only refers the status array for in-flight uops

    What does it mean in fact? Please make it clear.

    解决方案

    1. Like Agner Fog's microarch doc explains, the stack engine handles the rsp+=8 / rsp-=8 part of push/pop / call/ret in the register-rename stage (before issuing uops into the OOO core). So the OOO core only has to handle the load/store part, with an address generated by the stack engine. It occasionally has to insert a uop to sync its offset from rsp when the 8bit displacement counter overflows, or when the OOO core needs the value of rsp directly (e.g. sub rsp, 8, or mov [rsp-8], eax).


    1. The P6 microarch family (PPro to Nehalem) stored the values of architectural registers in the ROB. SnB-family microarchitectures (and P4) have a physical register file, so the ROB stores register numbers instead of the data directly. Re-Order Buffer is still an excellent name for that part of the CPU.

    Note that SnB introduced AVX, with 256b vectors. Making every ROB entry big enough to store double-size vectors was presumably undesirable compared to only keeping them in a smaller FP register file.

    SnB simplified the uop format to save power. This did lead to a sacrifice in uop micro-fusion capability, though: the decoders and uop-cache can still micro-fuse 2-register memory operands, but they're "unlaminated" before issuing into the OOO core.

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