是否有一个变量编译器内存屏障? [英] Is there a compiler memory barrier for a single variable?

查看:205
本文介绍了是否有一个变量编译器内存屏障?的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

编译器内存屏障具有除其他事项外效应强制编译器,以确保全部堆栈在寄存器变量缓存写入屏障前的记忆。

Compiler memory barriers has the effect among other things to force the compiler to make sure all stack variables that are cached in registers are written to memory before the barrier.

例如,GCC有如下语句:

For example, GCC has the following statement:

asm inline ("" : : : "memory");

有没有办法告诉编译器(GCC特别,但我感兴趣的是其他人也)做的只是一个具体变量一样的效果?类似如下结构想象:

Is there any way to tell a compiler (specifically GCC, but I'm interested in others as well) to do the same effect for only a specific variable? something like the following imagined construct:

int x;
...
asm inline ("" : : : "memory(x)");

使用的预期行为是x和值x唯一将被写入相应的存储单元,如果它发生在一个寄存器被缓存。

With the expected behavior that the value of x and x only will be written to the corresponding memory location, if it happens to be cached in a register.

这样做的原因是,我有一个特定的变量,我需要确保在寄存器中没有缓存,使硬件引擎可以读取它的价值。然而,一个完整的编译器内存屏障将强制编译器写入内存的所有其他可能注册在该时间点被缓存以及变量的值,可以达到更多的数据,然后我需要写。我想知道,如果有更具体的东西。

The reason for this is that I have a specific variable which I need to make sure is not cached in a register so that a hardware engine can read its value. However, a full compiler memory barrier will force the compiler to write to memory the value of all other variables that might be cached in register at that point in time as well which can amount to much more data then I need to write. I wondered if there something more specific.

在此先感谢!

推荐答案

{尝试INT Y = X; *(挥发性为int *)及X = Y; } 并检查得到的组件。

这篇关于是否有一个变量编译器内存屏障?的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

查看全文
登录 关闭
扫码关注1秒登录
发送“验证码”获取 | 15天全站免登陆