如何使Makefile自动重建包含修改的头文件的源文件？ （在C / C ++中） [英] How can I have a Makefile automatically rebuild source files that include a modified header file? (In C/C++)

问题描述

我有以下makefile，用于构建一个我正在开发的程序（一个内核）。从头开始，我正在学习这个过程，所以它不完美，但是我觉得它在这一点上足以满足我在写makefile的经验。

  AS = nasm 
 CC = gcc 
 LD = ld 
 
 TARGET = core 
 BUILD = build 
 SOURCES = source 
 INCLUDE = include 
 ASM =汇编
 
 VPATH = $（SOURCES）
 
 CFLAGS = -Wall -O -fstrength-reduce -fomit-frame -pointer -finline-functions \ 
 -nostdinc -fno-builtin -I $（INCLUDE）
 ASFLAGS = -f elf 
 
 #CFILES = core.c consoleio.c system.c 
 CFILES = $（foreach dir，$（SOURCES），$（notdir $（通配符$（dir）/ *。c）））
 SFILES = assembly / start.asm 
 
 SOBJS = $（SFILES：.asm = .o）
 COBJS = $（CFILES：.c = .o）
 OBJS = $（SOBJS）$（COBJS）
 
 build：$（TARGET）.img 
 
 $（TARGET）.img：$（TARGET）.elf 
c：/python26/python.exe concat.py stage1 st age2 pad.bin core.elf floppy.img 
 
 $（TARGET）.elf：$（OBJS）
 $（LD）-T link.ld -o $ @ $ ^ 
 
 $（SOBJS）：$（SFILES）
 $（AS）$（ASFLAGS）$< -o $ @ 
 
％.o：％.c 
 @echo编译$< ... 
 $（CC）$（CFLAGS）-c -o $ @ $< 
 
 #Clean脚本 - 应该清除所有.o文件到处和所有这些。 
 clean：
 -del * .img 
 -del * .o 
 -del assembly \ * .o 
 -del core.elf 
  

我的这个makefile的主要问题是，当我修改一个或多个C文件包含的头文件时，C文件是不要重建我可以很容易地解决这个问题，方法是让我的所有头文件都是我所有C文件的依赖关系，但是当我改变/添加一个头文件时，这样会有效地导致项目的完全重建，这不是很优雅。

我想要的仅仅是包含的C文件，我改变的头文件被重建，并且整个项目被链接再次。我可以通过使所有头文件成为目标的依赖关系来实现链接，但是我不知道如何使C文件在包含的头文件更新时失效。

我听说GCC有一些命令可以使之成为可能（所以makefile可以以某种方式弄清楚哪些文件需要重新构建），但是在我看来，我无法找到一个实际的实现示例。有人可以发布一个在makefile中启用此行为的解决方案吗？

编辑：我应该澄清一下，我熟悉将各个目标放在每个target.o都需要头文件。这需要我在每次将头文件包含在某个地方时编辑makefile，这有点痛苦。我正在寻找一个可以自己导出头文件依赖关系的解决方案，我相当确定我在其他项目中看到过。

解决方案

如本网站其他地方已经指出的，请参阅此页面：
http ：//make.paulandlesley.org/autodep.html

简而言之，gcc可以为您自动创建.d依赖文件，这是迷你makefile片段包含您编译的.c文件的依赖关系。
每次更改.c文件并进行编译时，.d文件将被更新。

除了将-M标志添加到gcc之外，需要在.file文件中包含.d文件（像上面写的Chris）。
页面中有一些比较复杂的问题，使用sed解决，但是您可以忽略它们，并做出make clean，以清除.d文件，当有人抱怨无法构建头文件不再存在。

I have the following makefile that I use to build a program (a kernel, actually) that I'm working on. Its from scratch and I'm learning about the process, so its not perfect, but I think its powerful enough at this point for my level of experience writing makefiles.

AS  =   nasm
CC  =   gcc
LD  =   ld

TARGET      =   core
BUILD       =   build
SOURCES     =   source
INCLUDE     =   include
ASM         =   assembly

VPATH = $(SOURCES)

CFLAGS  =   -Wall -O -fstrength-reduce -fomit-frame-pointer -finline-functions \
            -nostdinc -fno-builtin -I $(INCLUDE)
ASFLAGS =   -f elf

#CFILES     =   core.c consoleio.c system.c
CFILES      =   $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.c)))
SFILES      =   assembly/start.asm

SOBJS   =   $(SFILES:.asm=.o)
COBJS   =   $(CFILES:.c=.o)
OBJS    =   $(SOBJS) $(COBJS)

build : $(TARGET).img

$(TARGET).img : $(TARGET).elf
    c:/python26/python.exe concat.py stage1 stage2 pad.bin core.elf floppy.img

$(TARGET).elf : $(OBJS)
    $(LD) -T link.ld -o $@ $^

$(SOBJS) : $(SFILES)
    $(AS) $(ASFLAGS) $< -o $@

%.o: %.c
    @echo Compiling $<...
    $(CC) $(CFLAGS) -c -o $@ $<

#Clean Script - Should clear out all .o files everywhere and all that.
clean:
    -del *.img
    -del *.o
    -del assembly\*.o
    -del core.elf

My main issue with this makefile is that when I modify a header file that one or more C files include, the C files aren't rebuilt. I can fix this quite easily by having all of my header files be dependencies for all of my C files, but that would effectively cause a complete rebuild of the project any time I changed/added a header file, which would not be very graceful.

What I want is for only the C files that include the header file I change to be rebuilt, and for the entire project to be linked again. I can do the linking by causing all header files to be dependencies of the target, but I cannot figure out how to make the C files be invalidated when their included header files are newer.

I've heard that GCC has some commands to make this possible (so the makefile can somehow figure out which files need to be rebuilt) but I can't for the life of me find an actual implementation example to look at. Can someone post a solution that will enable this behavior in a makefile?

EDIT: I should clarify, I'm familiar with the concept of putting the individual targets in and having each target.o require the header files. That requires me to be editing the makefile every time I include a header file somewhere, which is a bit of a pain. I'm looking for a solution that can derive the header file dependencies on its own, which I'm fairly certain I've seen in other projects.

解决方案

As already pointed out elsewhere on this site, see this page: http://make.paulandlesley.org/autodep.html

In short, gcc can automatically create .d dependency files for you, which are mini makefile fragments containing the dependencies of the .c file you compiled. Every time you change the .c file and compile it, the .d file will be updated.

Besides adding the -M flag to gcc, you'll need to include the .d files in the makefile (like Chris wrote above). There are some more complicated issues in the page which are solved using sed, but you can ignore them and do a "make clean" to clear away the .d files whenever make complains about not being able to build a header file that no longer exists.

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