GNU Makefile将每条配方行都视为不带连续字符的子shell命令 [英] GNU Makefile treating each recipe line as sub-shell command without continuation character
问题描述
我正在尝试使target_compile
正常工作.
I am trying to get the target_compile
to work.
copy_shared_object:
cp shared_object.so ${CURRENT_DIR}
PROJECT_SIM_OPTS += -LDFLAGS -L${CURRENT_DIR},-lm -load
target_compile: copy_shared_object actual_compile_with_sim_opts
.
.
.
actual_compile_with_sim_opts:
.
.
.
尽管我没有在以cp
开头的第一行中添加;\
,但仍收到错误消息
I am getting the Error despite the fact that I have not added ;\
on the first line starting with cp
make: PROJECT_SIM_OPTS: Command not found
makefile:282: recipe for target 'copy_shared_object' failed
make: *** [copy_shared_object] Error 127
推荐答案
您可能想要的东西是:
${CURRENT_DIR}/shared_object.so: shared_object.so
cp $^ $@
target_compile: PROJECT_SIM_OPTS += -LDFLAGS -L${CURRENT_DIR},-lm -load
target_compile: copy_shared_object actual_compile_with_sim_opts
@echo PROJECT_SIM_OPTS=${PROJECT_SIM_OPTS} ...
解释一些事情(并重申@Beta的评论):变量${CURRENT_DIR}
是 makefile 变量.它可以来自环境或makefile. make将在其第一阶段(在运行任何规则之前).因此,在运行规则时无法更改其值. Makefile变量只有一个$
,并且如果它们是多字符标记,则需要在它们之间使用大括号.
To explain a few things (and to reiterate @Beta's remarks): The variable ${CURRENT_DIR}
is a makefile variable. It can come from either the environment or makefile. make will substitute the value for the variable name at its first phase (before it runs any rules). Therefore its value cannot be changed when running a rule. Makefile variables have a single $
, and require braces around them if they're multi-character tokens.
${PROJECT_SIM_OPTS}
是特定于目标的生成文件多变的.它仍然是makefile变量,因此在make执行规则时无法更改其值.话虽如此,它的值特定于target_compile
规则以及作为该规则结果正在运行的任何规则.
${PROJECT_SIM_OPTS}
is a target-specific makefile variable. It's still a makefile variable, so it cannot change its value when the make is executing the rules. That being said, its value is specific to the target_compile
rule, and any rule that is being run as a result of that rule.
对于 shell 变量,可以在配方中设置一个值,但是,该值的范围是该配方行本身.为了使用shell变量,您需要执行$$shellvarname
(使用两个$
,因为make在调用shell之前将$$
扩展为$
)也就是说,配方的每一行都在子外壳程序,并且任何变量值在其他子外壳程序中都不可见.因此,例如,如果您有:
For shell variables, it's possible to set a value within a recipe, however, the scope of that value is that recipe line itself. In order to use shell variables you need to do $$shellvarname
(with two $
's, as make expands $$
to $
before invoking the shell) That being said, each line of a recipe is run in a subshell, and any variable values will not be visible in other subshells. So, for example, if you have:
target: prereq
@shellVar="value"; echo "recipe1: shellVar is $$shellVar"
@echo "recipe2: shellVar is $$shellVar"
它将输出:
recipe1: shellVar is value
recipe2: shellVar is
因为配方1的子外壳程序无法与配方2的子外壳程序通信,因此配方2并不知道配方1的变量值.
as recipe1's subshell does not communicate with recipe2's subshell, and therefore recipe2 is not aware of recipe1's value for the variable.
这篇关于GNU Makefile将每条配方行都视为不带连续字符的子shell命令的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!