如何编译"not-main" (仅.hpp)文件与C ++中的makefile? [英] How to compile "not-main" (only .hpp) files with makefile in C++?

问题描述

我正在开发一个包含Main.cpp和一组.hpp文件的并行项目.我发现下面的Makefile适合在Xeon Phi上编译，部署和执行我的项目.这里的问题是，如果我仅编辑.hpp之一(而不是Main.cpp)，那么当我执行make compile时，显然没有任何反应(因此我必须先执行make clean).您能帮我更改它吗，所以如果我编辑file.hpp它将对其进行编译?谢谢！

I'm developing a parallel project with a Main.cpp and a set of .hpp files. I've found the Makefile below suitable to compile, deploy and execute my project on a Xeon Phi. The problem here is that if I edit only one of the .hpp (so not Main.cpp) then when I execute make compile obviously nothing happens (so I have to execute make clean before). Can you help me to change it so if I edit file.hpp then it will compile it? Thanks!

FF_ROOT     = /home/luca/fastflow
BOOST_ROOT  = /home/luca/boost_1_59_0
CC      = icpc -mmic
CXX     = $(CC) -std=c++11 -DNO_DEFAULT_MAPPING
INCLUDES    = -I $(BOOST_ROOT) -I $(FF_ROOT) 
CXXFLAGS    = 

LDFLAGS     = -pthread
OPTFLAGS    = -O3 -finline-functions -DNDEBUG -g -O0

TARGETS     =               \
        Main                \

.PHONY: all clean copy exec cleanall
.SUFFIXES: .cpp 

%: %.cpp
    $(CXX) $(CXXFLAGS) $(INCLUDES) $(OPTFLAGS) -o $@ $< $(LDFLAGS)

all: compile

compile: $(TARGETS)

copy:   
        scp $(TARGETS) mic0:
exec:   
        ssh mic0 './$(TARGETS) $(ARGS)'
clean: 
        rm -f $(TARGETS)
cleanall    : clean
        \rm -f *.o *~

推荐答案

您的Makefile公然不足 .目前，它仅包含用于将一个输入转换为另一个输入的命令，但它缺少任何构建系统的关键组成部分:依赖项.

Your Makefile is blatantly not sufficient. At the moment it only contains the commands to translate from one input to the next, but it's missing the crucial ingredient of any build system: Dependencies.

很难手动维护依赖关系.您可以手动添加main: a.hpp b.hpp等，但是该比例无法缩放，并且在重构时会忘记对其进行更新.这就是为什么make通常不是用户应直接使用的东西. make有点像汇编程序:这是表达构建规则的最终层次，但是创建构建规则最好留给更高层次的系统(例如automake或cmake或该领域中的任何其他竞争者；或甚至是旧的makedepend).

Dependencies are hard to maintain by hand. You could add main: a.hpp b.hpp etc by hand, but that doesn't scale and you forget to update it when you refactor. That's why make is not usually something the user should use directly. make is a bit like assembler: it's the final level at which build rules are expressed, but creating the build rules is best left to a higher-level system (e.g. automake or cmake or any of the other competitors in the field; or even the old makedepend).

作为旁注，您真的不想直接从源代码构建二进制文件，这几乎破坏了拥有Makefile的所有要点.您确实希望将项目分解为单独编译的翻译单元，以便仅在更改后重建最小的数量.

As a side note, you really don't want to build the binary directly from source, that defeats almost all points of having a Makefile. You really want to break your project into separately compiled translation units, so that you only rebuild the minimal amount after a change.

OBJS := a.o b.o c.o

main: $(OBJS)
    $(CXX) $(CXXFLAGS) $(LDFLAGS) $< -o $@

.cc.o:
    $(CXX) $(CXXFLAGS) -c $< -o $@

# Dependencies! This is in addition to the implied "foo.o: foo.cc" above.

a.o: a.h b.h tools.h
b.o: b.h tools.h
c.o: c.h b.h weirdstuff.h

许多教程对此进行了解释.

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