MESI缓存协议 [英] MESI cache protocol

问题描述

我正在阅读有关 MESI侦听缓存一致性协议的信息，我猜这是该协议在现代多核x86处理器中使用的代码(如果我记错了，请纠正我).现在，这篇文章在一个地方说了这一点.

I was reading about the MESI snooping cache coherence protocol, which I guess is the protocol that is used in modern multicore x86 processors (please correct me if I'm wrong). Now that article says this at one place.

将行保持为已修改"状态的缓存必须监听(拦截)所有 尝试读取(从系统中的所有其他高速缓存中) 相应的主内存位置，然后插入其保存的数据.这是 通常通过强制回退读取(即稍后重试)，然后写入来完成 将数据保存到主内存，然后将缓存行更改为共享"状态.

A cache that holds a line in the Modified state must snoop (intercept) all attempted reads (from all of the other caches in the system) of the corresponding main memory location and insert the data that it holds. This is typically done by forcing the read to back off (i.e. retry later), then writing the data to main memory and changing the cache line to the Shared state.

现在我不明白的是为什么需要将数据写入主存储器.难道缓存的一致性只是使缓存中的内容保持同步而无需进入内存(除非缓存行确实被逐出了)?我的意思是，如果一个核心不断读取而另一个核心不断写入，为什么不将数据保留在高速缓存存储器中，并继续更新高速缓存中的数据.为什么要产生写回主存储器的性能?

Now what I don't understand is why the data needs to be written in the main memory. Cant the cache coherence just keeps the content in the caches synchronized without going to the memory (unless the cache line is truly evicted ofcourse)? I mean if one core is constantly reading and the other constantly writing, why not keep the data in the cache memory, and keep updating the data in the cache. Why incur the performance of writing back to the main memory?

换句话说，内核不能读取数据，直接从写入内核的缓存中读取并相应地修改其缓存吗?

In other words, can't the cores reading the data, directly read from the cache of the writing core and modify their cache accordingly?

推荐答案

现在我不明白的是为什么需要将数据写入主存储器.不能 缓存一致性仅使缓存中的内容保持同步，而无需 内存(除非高速缓存行确实被清除了)?

Now what I don't understand is why the data needs to be written in the main memory. Cant the cache coherence just keeps the content in the caches synchronized without going to the memory (unless the cache line is truly evicted ofcourse)?

这确实发生了.

我的笔记本电脑上有一个看起来像这样的iCore 5；

I have on my laptop an iCore 5 which looks like this;

   M
   N
   S
  L3U
L2U L2U
L1D L1D
L1I L1I
 P   P
L L L L

M = Main memory
N = NUMA node
S = Socket
L3U = Level 3 Unified
L2U = Level 2 Unified
L1D = Level 1 Data
L1I = Level 1 Instruction
P = Processor
L = Logical core

当两个逻辑内核对同一数据进行操作时，它们不会移出至主存储器；它们通过L1和L2缓存进行交换.同样，当两个处理器中的内核正常工作时，它们将通过L3缓存交换数据.除非发生逐出，否则不会使用主内存.

When two logical cores are operating on the same data, they don't move out to main memory; they exchange over the L1 and L2 caches. Likewise, when cores in the two processors are working, they exchange data over the L3 cache. Main memory isn't used unless eviction occurs.

但是，更简单的CPU确实可能对事情不太聪明.

But a simpler CPU could indeed be less clever about things.

这篇关于MESI缓存协议的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！