如何定义SCI-系统控制中断向量? [英] How SCI - System Control Interrupt vector is defined?
问题描述
根据ACPI规范， FADT (固定的ACPI描述表)表包含一个向OS报告 SCI中断号的字段.该字段定义如下:
According to the ACPI spec, The FADT (Fixed ACPI Description Table) table contains a field that reports the SCI interrupt number to OS. The field is defined as below:
我将FADT表转储到了Intel x86平台上，看到SCI中断与编号9相关联:
I dumped the FADT table on an Intel x86 platform and see the SCI interrupt is associated with the number 9:
但是根据英特尔手册，0-31是IA体系结构定义的中断的保留向量.具体来说，9定义为:
But according to the Intel Manual, 0-31 are reserved vectors for IA architecturally defined interrupts. Specifically, the 9 is defined as:
因此，根据说明，在I386处理器之后不会生成9.所以我想这就是为什么SCI可以 救赎 的原因.这可以看作是ACPI规范的特定于x86的实现.
So, according to the note, the 9 is not generated after I386 processor. So I guess that's why 9 can be salvaged for SCI. This can be seen as a x86-specific implementation of the ACPI spec.
我对吗?
似乎我在这里误解了一些东西.稍后会更新.
Seems I misunderstand something here. Will update later.
推荐答案
Throughout the ACPI specifications every notification event that uses the interrupting mechanism gets associated with a Global System Interrupt (GSI).
GSIs are briefly described in section 5.2.13 Global System Interrupts of the 6.1 ACPI specifications linked previously1.
可以将全局系统中断视为ACPI即插即用IRQ号.
他们习惯了 在执行中断资源分配的表和ASL方法中虚拟化中断.
Global System Interrupts can be thought of as ACPI Plug and Play IRQ numbers.
They are used to virtualize interrupts in tables and in ASL methods that perform resource allocation of interrupts.
规范使用术语系统矢量表示GSI的编号.
例如，GSI编号9的系统向量编号为9.
众所周知，这是令人困惑的，因为向量"一词可能会误以为英特尔手册中的中断向量"中的向量"一词.
The specifications use the term system vector to denote the number of the GSI.
For example, the GSI number 9 has system vector number 9.
This is admittedly confusing as the term "vector" can be mistaken for the term "vector" in "interrupt vector" as used in Intel manuals.
要了解GSI，必须至少了解或理解IRQ.
x86系统上的两个标准中断控制器是
To understand GSIs one must have a minimum understanding or IRQs.
The two standard interrupt controllers on an x86 system are
-
8259A PIC [数据表] [OSDev Wiki]
在标准IO地址上始终有两个PIC，每个PIC都有八个输入引脚(IR 0-7).
一个PIC是主机，处理IRQ 0-7.
另一个是从属服务器，处理IRQ 8-15，其输出发送到主控主机 2 的IR2.
The 8259A PIC [datasheet] [OSDev wiki]
There are always two PICs, at standard IO addresses, each with eight input pins (IR 0-7).
One PIC is the master and handles IRQ 0-7.
The other is the slave and handles IRQ 8-15, its output goes to IR2 of the master2.
IO APIC [数据表] [OSDev Wiki] .
请勿将IO APIC与LAPIC混淆.
可以有一个或多个IO APIC，所有内存映射到可变(但通常是固定的)地址，每个地址都有可变数量的输入引脚INTINx.
通常，将IO APIC之一连接并配置为模拟PIC，将INTIN0-15映射到IRQ0-15，但这不是必需的.
The IO APIC [datasheet] [OSDev wiki].
Do not confuse the IO APIC with the LAPIC.
There can be one or multiple IO APICs, all memory mapped at variable (but usually fixed) addresses, each with a variable number of input pins INTINx.
Usually, one of the IO APIC is wired and configured to emulate the PICs, INTIN0-15 are mapped to IRQ0-15 but this is not a requirement.
消息提示中断 [ OSDev论坛线程]
这不是中断控制器(因此它不会累加计数)，但是值得一提.
PIC是第一代控制器，IO APIC是第二代控制器，MSI是第三代.
它们实现为对特定内存地址的写操作，因此不需要控制器.
在x86系统上，将PCI(e)设备配置为写入LAPIC专用区域 3 .
Message signalled interrupts[OSDev forum thread]
This is not an interrupt controller (hence it doesn't add up in the count) but it's worth mentioning.
The PIC was the first generation controller, the IO APIC the second and MSIs are the third.
They are implemented as writes to specific memory addresses and as such require no controller.
On an x86 system, a PCI(e) device is configured to do a write into the LAPIC dedicated area3.
将中断控制器与LAPIC一起配置为将IRQ编号映射为向量编号.
PIC的标准配置是
The interrupt controllers are configured, along with the LAPIC, to map an IRQ number into a vector number.
The standard configuration for the PIC is
IRQ 0-7 -> INT 08h - 0fh
IRQ 8-15 -> INT 70h - 77h
请注意，将第一个IRQ映射到基址08h是IBM的一个错误(Intel将前32个中断向量标记为保留).
Note that mapping the first IRQs at base 08h was a mistake by IBM (Intel marked the first 32 interrupt vectors as reserved).
一旦知道了IRQ编号就很容易获得INT编号，操作系统通常可以轻松地为此目的创建一个表，因为众所周知(或可以通过ACPI表来知道)中断控制器的连接方式到CPU.
Once one knows the IRQ number it is easy to get the INT number, the OS generally can easily make a table for that purpose since it is well known (or can be known with the ACPI tables) how the interrupt controllers are connected to the CPUs.
将IRQ与设备关联(称为中断路由的过程)非常复杂，因为它需要了解设备的连接方式，ACPI规范使用GSI来简化此方面.
Associating an IRQ to a device (a process known as interrupt routeing) is very complex because it requires a knowledge of how devices are connected, the ACPI specifications use GSIs to simplify this aspect.
最后，必须将GSI(或ACPI词，系统向量)映射到IRQ，这在PIC模式下或通过分配GSI基数以一对一的方式完成(系统向量基础)分配给每个IO APIC-从而将所有GSI从基础分配给引脚数减去一.
In the end, GSIs (or in ACPI words, system vectors) must be mapped to IRQs, this is done in one-to-one fashion when in PIC mode or by assigning a GSI base (system vector base) to each IO APIC - thereby assigning it all the GSIs from the base to the number of pins minus one.
牢记所有这些，我们终于可以理解SCI_INT字段的描述:
With all this in mind, we can finally understand the description of the SCI_INT field:
在8259模式下，将SCI中断连接到的系统向量.在 不包含8259的系统，此字段包含 SCI中断的全局系统中断号.
System vector the SCI interrupt is wired to in 8259 mode. On systems that do not contain the 8259, this field contains the Global System interrupt number of the SCI interrupt.
我认为该文本不准确，全局系统中断号只是系统向量的别称，因此，整个文本都简化为"SCI中断的系统向量" ".
The text is imprecise in my opinion, Global System interrupt number is just another name for system vector and thus the whole text reduces to "System vector for the SCI interrupt".
SCI是系统矢量，它具有GSI的性质，因此您找到的数字9是IRQ 9 4 . 默认情况下，IRQ 9是INT 71h，但是任何使用ACPI的操作系统都一定会将IRQ重新映射到其他基础，并且肯定避免了与处理器异常的任何冲突.
The SCI, being a system vector number, it has the nature of a GSI so the number 9 you found is the IRQ 94. By default, IRQ 9 is the INT 71h but any OS that use ACPI surely has remapped the IRQs to a different base and had surely avoided any conflict with the processor exceptions.
长话短说，数字9不是中断向量，而是系统向量(由ACPI定义).
Long story short, the number 9 is not an interrupt vector but a system vector (as defined by ACPI).
GSI <----> IRQ <----> INT
System vector Interrupt vector
1 撰写本文时的最新信息.
2 按其配置进行配置，8259A在设计时考虑了链接.
3 在所有LAPIC之间共享，但可以重新映射，特别是对于非SMP系统，以避免跨越QPI链接.
4 众所周知，在APIC模式下，GSI 9可以由不处理ISA IRQ的IO APIC来处理.
1the latest at the moment of writing.
2 which is configured as it, the 8259A was designed with chaining in mind.
3 which is shared among all LAPIC but can be remapped, especially for non-SMP systems to avoid crossing a QPI link.
4 Not strictly true as we know, in APIC mode the GSI 9 can be handled by an IO APIC that doesn't handle ISA IRQs.
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