有人可以解释的Exynos ARM的电源控制寄存器？ [英] Can someone explain the power control register in exynos ARM?

问题描述

在Linux内核中，更准确的在3.9 RC6 /arch/arm/mach-exynos/cpuidle.c ，行读

In the Linux kernel, more accurately /arch/arm/mach-exynos/cpuidle.c on 3.9-rc6, the lines reads

static unsigned int g_pwr_ctrl, g_diag_reg;

static void save_cpu_arch_register(void)
{
    /*read power control register*/
    asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
    /*read diagnostic register*/
    asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
    return;
}

研究了这个问题之后，这似乎是的 GCC内联的组装。考虑到这是一个重要组成部分，在 ASM 正在读这个，因为它要么

After researching the issue, this appears to be gcc inline assembly. Considering it's a critical component, the asm is reading this as it's either

1. 更快，因此更有效的


2. 在c不可

我查了 ARM手册为 MCR 因为我学习汇编，但我可以告诉 MCR 是一个协处理器，由于其三个字母的长度。内联汇编出现访问电源控制寄存器并保存结果（从寄存器）到一个无符号整数，在第一线（在某些时候被调用的时候，我期望的那样）。

I checked the ARM Manual for MCR as I'm learning assembly, but I could tell MCR was a Coprocessor due to its three letter length. The inline asm appears to access the power control register and save the result (from the register) into an unsigned integer in the first line (to be called up at some point, I expect).

在关于功率控制寄存器，手臂说明书中列出，

In regards to the power control register, the arm manual lists,

• 为您实现Cortex-A9处理器的时钟延迟


• 动态时钟门控。

我无法理解为什么这是需要不惜一切，这可以在飞行中进行访问，在函数。

I'm having trouble understanding why this is needed at-all, this can be accessed on the fly, in a function.

最后，ARM手册列出了32位位宽寄存器的设计。该基地时钟似乎设置那里，我们都读这同时从空闲上下文进程启动？

Lastly, the ARM Manual lists the design of the 32bit wide register. The base-clock appears to be set there, are we reading this while starting up from an idle context process?

我还发现一个<一个href=\"http://stackoverflow.com/questions/12179872/what-does-the-given-line-do-in-arm-assembly-and-what-is-the-purpose-of-each-vari\">similar问题 - 这也可以帮助你。

I have also found a similar question - this may also help you.

推荐答案

您的问题不缺乏关注，请考虑更新它。我会假设你正在试图了解在的Exynos 暂停在Linux内核/恢复机制。

Your question does lack focus, please consider updating it. I will assume that you are trying to understand the exynos suspend/resume mechanism in the Linux kernel.

...这似乎是的 GCC内联组装。考虑到这是一个重要的组成部分，ASM正在读这个，因为它要么

  一个）更快，因此更有效的;

  B）用C不可用

... this appears to be gcc inline assembly. Considering it's a critical component, the asm is reading this as it's either
a) faster, and therefore more efficient;
b) not available in C

我们选择选项的乙，没有办法给前preSS MCR / MRC 中的 C 的

We choose option b, there is no way to express mcr/mrc in C.

其次，... ：CC）;

这是一个 GCC 撞名单。它说，的条件codeS 的将被指令改变。这也许只是确保 GCC 决定不放弃这一指令。你可以阅读更多 GCC手册。

This is a gcc clobber list. It says that the condition codes will be altered by the instruction. This maybe just to ensure that gcc decides not to discard this instruction. You can read more in the gcc manual.

我无法理解为什么这是需要不惜一切，这可以在飞行中进行访问，在函数。

I'm having trouble understanding why this is needed at-all, this can be accessed on the fly, in a function.

您需要看的部分是 exynos4_enter_core0_aftr（）。这同时使用 save_cpu_arch_register（）和 restore_cpu_arch_register（）。所以，有一个双重的功能集，我们注意该值存储在<青霉>全局的。另外要注意的是 cpu_suspend（0，idle_finisher）; 。这个函数告诉Linux在 CPU 暂停，然后调用 cpu_do_idle（）; 这通常是一个ARM的 WFI （的等待中断）指令。这使得CPU的冻结是在该指令，直到已启用的中断触发。与全速挂起CPU时钟的问题，这是可以浪费一些电流/功率。通常情况下，SDRAM和平台的时钟可能自动把在低功耗状态在此模式下。

The portion you need to look at is exynos4_enter_core0_aftr(). This uses both save_cpu_arch_register() and restore_cpu_arch_register(). So, there is a dual set of functions and we note that the values are stored in globals. The other thing to note is the cpu_suspend(0, idle_finisher);. This function tells Linux the cpu is suspended and then calls cpu_do_idle(); which is usually an ARM WFI (wait for interrupt) instruction. This makes the CPU freeze at that instruction until an enabled interrupt triggers. The issue with suspending a CPU clock at full speed, is this can waste some current/power. Typically, SDRAM and platform clocks maybe automatically put to in low power states in this mode.

您将必须谘询你的CPU / SOC数据表更多。然而，回到问题。这是最有可能的，这种低功耗模式破坏/改变这些协处理器寄存器，因此 save_cpu_arch_register（）和 restore_cpu_arch_register（）需要，以确保他们仍然是他们的呼叫。在code大概可以使用 exynos4_enter_core0_aftr当地人（）。他们确实需要保存和恢复或CPU可奇怪的功率/电压/时钟恢复。这也可能是 cpu_do_idle（）是凌驾为您的机器，它是改变这些寄存器。

You will have to consult the data sheets on your CPU/SOC for more. However, back to the question. It is most likely that this low power mode destroys/alters these co-processor registers, so save_cpu_arch_register() and restore_cpu_arch_register() are needed to ensure they remain as they were before the call. The code could probably use locals in exynos4_enter_core0_aftr(). They do need to be saved and restored or the CPU may resume with weird power/voltage/clocks. It could also be that cpu_do_idle() is over-ridden for your machine and it is altering these registers.

所以简单地说，这个功能是保存，将被破坏的一些状态，当CPU进入的暂停或等待中断的模式。

So briefly, this function is to save some state that will be destroyed when the CPU goes to suspend or wait for interrupt mode.

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