VHDL n 位桶形移位器 [英] VHDL n-bit barrel shifter

问题描述

我有一个使用行为架构的 32 位桶形移位器.现在我需要将其转换为 n 位移位器.我面临的问题是 for 循环存在某种限制，我必须将常量作为标记值.

以下是我的代码

图书馆IEEE;使用 IEEE.std_logic_1164.all;实体 bshift 是 -- 桶形移位器端口(左:在 std_logic 中；- '1' 代表左边，'0' 代表右边逻辑:在 std_logic 中；-- '1' 代表逻辑，'0' 代表算术shift : 在 std_logic_vector(4 downto 0) 中；-- 班次计数输入:在 std_logic_vector (31 downto 0) 中；输出:输出 std_logic_vector (31 downto 0) )；结束实体bshift；bshift 的架构行为是函数 to_integer(sig : std_logic_vector) 返回整数是变量 num : 整数 := 0;-- 将 sig 降为整数开始for i in sig'range loop如果 sig(i)='1' 那么数量:=数量*2+1；别的数量:=数量*2；万一;结束循环；-  一世返回编号；结束函数 to_integer;开始——行为shft32:过程(左，逻辑，输入，移位)变量 shft :整数；变量 out_right_arithmetic : std_logic_vector(31 downto 0);变量 out_right_logical : std_logic_vector(31 downto 0);变量 out_left_logical : std_logic_vector(31 downto 0);开始shft := to_integer(shift);如果逻辑 = '0' 那么out_right_arithmetic := (31 downto 32-shft => input(31)) &输入(31 向下到 shft)；250 ps 后输出 <= out_right_arithmetic;别的如果左 = '1' 那么out_left_logical := input(31-shft downto 0) &(shft-1 降到 0 => '0');输出 <= out_left_logical 后 250 ps;别的out_right_logical := (31 downto 32-shft => '0') &输入(31 向下到 shft)；250 ps 后输出 <= out_right_logical;万一;万一;结束进程 shft32；最终架构行为；-- bshift的

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任何帮助将不胜感激

解决方案

您的代码不是桶形移位器实现，因为桶形移位器是多路复用树.

如果您有一个 32 位 BarrelShifter 模块，您将需要一个 5 位 Shift 输入，其中每个位位置 i 启用 2^i 移位操作.

例如 shift = 5d -> 00101b 使第 1 阶段中的多路复用器能够移位 1 位，使第 3 阶段中的多路复用器能够移位 4 位.所有其他多路复用阶段都设置为通过(shift(i) = 0).

我也不建议将基本换档与换档模式(算术、逻辑、旋转)和方向(左、右)混为一谈.

• 算术和逻辑的区别只是移入值
• 右移可以通过转换完成 => shiftright = reverse(shiftleft(reverse(input), n)

<小时>

可以在此处找到开源实现:
https://github.com/VLSI-EDA/PoC/blob/master/src/arith/arith_shifter_barrel.vhdl

I have a 32 bit barrel shifter using behavior architecture. Now I need to convert it to an n-bit shifter. The problem that I'm facing is that there is some kind of restriction to the for loop that I have to put a constant as sentinel value.

Following is my Code

library IEEE;
use IEEE.std_logic_1164.all;

Entity bshift is   -- barrel shifter
      port (left    : in  std_logic; -- '1' for left, '0' for right
            logical : in  std_logic; -- '1' for logical, '0' for arithmetic
            shift   : in  std_logic_vector(4 downto 0);  -- shift count
            input   : in  std_logic_vector (31 downto 0);
            output  : out std_logic_vector (31 downto 0) );
end entity bshift;


architecture behavior of bshift is
  function to_integer(sig : std_logic_vector) return integer is
    variable num : integer := 0;  -- descending sig as integer
  begin
    for i in sig'range loop
      if sig(i)='1' then
        num := num*2+1;
      else
        num := num*2;
      end if;
    end loop;  -- i
    return num;
  end function to_integer;

begin  -- behavior
  shft32: process(left, logical, input, shift)
            variable shft : integer;
            variable out_right_arithmetic : std_logic_vector(31 downto 0);
            variable out_right_logical    : std_logic_vector(31 downto 0);
            variable out_left_logical     : std_logic_vector(31 downto 0);
          begin
            shft := to_integer(shift);
            if logical = '0' then
              out_right_arithmetic := (31 downto 32-shft => input(31)) &
                                      input(31 downto shft);
              output <= out_right_arithmetic after 250 ps;
            else
              if left = '1' then
                out_left_logical := input(31-shft downto 0) &
                                    (shft-1 downto 0 => '0');
                output <= out_left_logical after 250 ps;
              else
                out_right_logical := (31 downto 32-shft => '0') &
                                     input(31 downto shft);
                output <= out_right_logical after 250 ps;
              end if;
            end if;
          end process shft32;
end architecture behavior;  -- of bshift

---

any help will be appreciated

解决方案

Your code is not a barrel shifter implementation, because a barrel shift is a mux-tree.

If you have a 32 bit BarrelShifter module, you will need a 5 bit Shift input, wherein every bit position i enables a 2^i shift operation.

So for example shift = 5d -> 00101b enables a mux in stage 1 to shift for 1 bit and a mux in stage 3 to shift 4 bits. All other mux stages are set to pass through (shift(i) = 0).

I also would not advice to mix up basic shifting with shift modes (arithmetic, logic, rotate) and directions (left, right).

• arithmetic and logic is only different in the shift-in value
• shift right can be done by a conversion => shiftright = reverse(shiftleft(reverse(input), n)

---

An open source implementation can be found here:
https://github.com/VLSI-EDA/PoC/blob/master/src/arith/arith_shifter_barrel.vhdl

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