在 ARM cortex A-9 的 U-boot 中启用中断 [英] Enabling Interrupts in U-boot for ARM cortex A-9

问题描述

我正在尝试在 uboot 中配置 GPIO 中断，这是为了在没有任何操作系统干预(裸机)的情况下测试中断响应时间.我能够配置引脚复用，并成功地使用 GPIO 引脚设置中断.

I am trying to configure a GPIO interrupt in the uboot, This it to test the Interrupt response time without any OS intervention (Bare-metal). I was able to configure the pin-muxing and also successful in setting up the interrupt with the GPIO pin.

我的问题是关于中断服务程序的注册.我看到我的平台的中断向量表位于地址 0xFFFF0000(我阅读了系统控制寄存器以找出这一点).GPIO 的中断 ID 是 56，我只是计算了我的中断服务例程应该驻留的地址，然后尝试使用指向我的 ISR 例程的指针写入地址.这是正确的做法吗?或者我必须自己处理所有其他事情，例如上下文保存等?

My question is regarding the registering of the interrupt service routine. I see that the Interrupt vector table for my platform is at address 0xFFFF0000 ( I read the System Control Register to find out this). The interrupt Id for the GPIO was 56 and with that i just calculated the address where my interrupt service routine should reside and just tried writing the address with the pointer to my ISR routine. Is this the right way of doing it? or i have to take care of the all the other things like context saving etc by myself?

注意:我使用的是 ARM Cortex A-9.

Note : I am using an ARM Cortex A-9.

根据我浏览代码的答案，我有以下问题.

Based on the answers i went through the code i have the following questions. The definition of

do_irq 对我的架构(arm v7)没有太大作用，CONFIG_USE_IRQ 对我不起作用，因为没有为我定义 arch_interrupt_init 之类的函数.所以我可以得出结论，我的架构不支持中断.现在，如果我必须自己定义它，我需要实现哪些功能才能使其正常工作?由于这是我项目的一小部分，我想看看我是否可以做到这一点是否可行.我只想知道这是否需要几行代码或需要一些努力来实现这种中断支持.

do_irq for my architecture( arm v7) is not doing much and the CONFIG_USE_IRQ does not work for me since functions like arch_interrupt_init are not defined for me. So i can conclude interrupts are not supported for my architecture. Now If i have to define this on my own what all functions i need to implement to get this working? Since this is a very small part of my proj and i would want to see if i can do this is feasible to implement. I just want to know if this requires few lines of code or requires some effort to implement this interrupt support.

推荐答案

ARM 将所有中断向量化到地址 0xFFFF0018(或 0x00000018).这通常是一个无条件的分支.然后代码将检查一些中断控制器硬件以确定数量56.通常，有一个例程来设置中断号的处理程序，因此您无需手动修补代码；此表取决于 u-boot 中断处理的实现方式.

The ARM vectors all interrupts to address 0xFFFF0018 (or 0x00000018). This is typically an unconditional branch. Then the code will inspect some interrupt controller hardware to determine the number 56. Typically, there is a routine to set the handler for the interrupt number, so you don't manually patch the code; this table is dependent on how the u-boot interrupt handling is implemented.

在我的u-boot源码^note中，中断表是这样的，

In my u-boot source^note, the interrupt table looks like this,

.globl _start
_start:
    b       reset
    ldr     pc, _undefined_instruction
    ldr     pc, _software_interrupt
    ldr     pc, _prefetch_abort
    ldr     pc, _data_abort
    ldr     pc, _not_used
    ldr     pc, _irq
    ldr     pc, _fiq
...
_irq:
        .word irq

所以_irq是安装中断处理例程的标签；它在同一个文件中执行一些汇编程序，然后根据 CONFIG_USE_IRQ 调用 do_irq().API 的一部分位于 *lib_arm/interrupts.c* 中.一些CPU被定义为处理irqs，例如cpu/arm720t/interrupts.c，用于S3C4510B.在这里你可以看到代码从这个控制器获取一个寄存器，然后分支到一个表.

So _irq is a label to install a routine for interrupt handling; it does some assembler in the same file and then calls do_irq(), based on CONFIG_USE_IRQ. Part of the API is in *lib_arm/interrupts.c*. Some CPUs are defined to handler irqs, such as cpu/arm720t/interrupts.c, for a S3C4510B. Here you can see that the code gets a register from this controller and then branches to a table.

所以默认情况下u-boot 似乎不支持中断.这并不奇怪，因为为了简单和速度，引导加载程序通常轮询.

So by default u-boot doesn't seem to have support for interrupts. This is not surprising as a boot loader is usually polling based for simplicity and speed.

注意:我的u-boot基于2009.01-rc3.

Note: My u-boot is base on 2009.01-rc3.

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